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Searched refs:MPU_ACCESS_CACHEABLE (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_cortex.h141 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
311 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_cortex.h147 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
292 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_cortex.h141 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
311 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_hal_cortex.h148 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
312 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_cortex.h141 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
311 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_cortex.h155 #define MPU_ACCESS_CACHEABLE 1U macro
341 #define IS_MPU_ACCESS_CACHEABLE(__STATE__) (((__STATE__) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_cortex.h159 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
303 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_cortex.h155 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01U) macro
330 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_cortex.h157 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
340 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_cortex.h156 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
332 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_cortex.h145 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
318 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_cortex.h156 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
332 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_cortex.h155 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
332 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_cortex.h154 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01U) macro
333 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_cortex.h156 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
342 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_cortex.h157 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
343 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_cortex.h160 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
357 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_cortex.h155 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) macro
366 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \