Searched refs:MC_AHB3ENCLRR (Results 1 – 25 of 26) sorted by relevance
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2369 #define __HAL_RCC_DCMI_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_DCMIEN)2371 #define __HAL_RCC_CRYP2_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_CRYP2EN)2373 #define __HAL_RCC_HASH2_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_HASH2EN)2374 #define __HAL_RCC_RNG2_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_RNG2EN)2375 #define __HAL_RCC_CRC2_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_CRC2EN)2376 #define __HAL_RCC_HSEM_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_HSEMEN)2377 #define __HAL_RCC_IPCC_CLK_DISABLE() (RCC->MC_AHB3ENCLRR = RCC_MC_AHB3ENCLRR_IPCCEN)
568 WRITE_REG(RCC->MC_AHB3ENCLRR, Periphs); in LL_AHB3_GRP1_DisableClock()
1755 …__IO uint32_t MC_AHB3ENCLRR; /*!< RCC AHB3 Peripheral Enable For MCU Clear Register … member
1721 …__IO uint32_t MC_AHB3ENCLRR; /*!< RCC AHB3 Peripheral Enable For MCU Clear Register … member
1856 …__IO uint32_t MC_AHB3ENCLRR; /*!< RCC AHB3 Peripheral Enable For MCU Clear Register … member
1822 …__IO uint32_t MC_AHB3ENCLRR; /*!< RCC AHB3 Peripheral Enable For MCU Clear Register … member
1943 …__IO uint32_t MC_AHB3ENCLRR; /*!< RCC AHB3 Peripheral Enable For MCU Clear Register … member
1909 …__IO uint32_t MC_AHB3ENCLRR; /*!< RCC AHB3 Peripheral Enable For MCU Clear Register … member