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Searched refs:LPTIM_HWCFGR_CFG2_Msk (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h33237 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33238 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151fxx_cm4.h33400 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33401 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151axx_ca7.h33237 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33238 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151axx_cm4.h33203 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33204 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151dxx_cm4.h33203 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33204 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151cxx_ca7.h33434 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33435 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151cxx_cm4.h33400 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33401 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp151fxx_ca7.h33434 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
33435 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153axx_ca7.h34788 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34789 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153axx_cm4.h34754 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34755 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153cxx_ca7.h34985 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34986 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153cxx_cm4.h34951 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34952 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153dxx_ca7.h34788 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34789 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153dxx_cm4.h34754 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34755 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153fxx_ca7.h34985 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34986 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp153fxx_cm4.h34951 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
34952 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157axx_ca7.h36011 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
36012 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157axx_cm4.h35977 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
35978 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157cxx_ca7.h36208 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
36209 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157cxx_cm4.h36174 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
36175 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157dxx_ca7.h36011 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
36012 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157dxx_cm4.h35977 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
35978 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157fxx_ca7.h36208 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
36209 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */
Dstm32mp157fxx_cm4.h36174 #define LPTIM_HWCFGR_CFG2_Msk (0xFFUL << LPTIM_HWCFGR_CFG2_Pos) /*!< 0x0000FF00 */ macro
36175 #define LPTIM_HWCFGR_CFG2 LPTIM_HWCFGR_CFG2_Msk /*!< HW CFG2 */