1 /** 2 ****************************************************************************** 3 * @file stm32wb0x_ll_utils.h 4 * @author MCD Application Team 5 * @brief Header file of UTILS LL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2024 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 @verbatim 18 ============================================================================== 19 ##### How to use this driver ##### 20 ============================================================================== 21 [..] 22 The LL UTILS driver contains a set of generic APIs that can be 23 used by user: 24 (+) Device electronic signature 25 (+) Timing functions 26 (+) PLL configuration functions 27 28 @endverbatim 29 ****************************************************************************** 30 */ 31 32 /* Define to prevent recursive inclusion -------------------------------------*/ 33 #ifndef STM32WB0x_LL_UTILS_H 34 #define STM32WB0x_LL_UTILS_H 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 /* Includes ------------------------------------------------------------------*/ 41 #include "stm32wb0x.h" 42 43 /** @addtogroup STM32WB0x_LL_Driver 44 * @{ 45 */ 46 47 /** @defgroup UTILS_LL UTILS 48 * @{ 49 */ 50 51 /* Private types -------------------------------------------------------------*/ 52 /* Private variables ---------------------------------------------------------*/ 53 54 /* Private constants ---------------------------------------------------------*/ 55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants 56 * @{ 57 */ 58 59 /* Max delay can be used in LL_mDelay */ 60 #define LL_MAX_DELAY 0xFFFFFFFFU 61 62 /** 63 * @brief Unique device ID register base address 64 */ 65 #define UID_BASE_ADDRESS UID64_BASE 66 67 /** 68 * @brief Flash size data register base address 69 */ 70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE 71 72 /** 73 * @brief RAM size data register base address 74 */ 75 #define RAMSIZE_BASE_ADDRESS RAMSIZE_BASE 76 77 /** 78 * @brief Package data register base address 79 */ 80 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE 81 82 /** 83 * @brief Device ID data register base address 84 */ 85 #define DEV_ID_BASE_ADDRESS DEV_ID_BASE 86 87 /** 88 * @} 89 */ 90 91 /* Private macros ------------------------------------------------------------*/ 92 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros 93 * @{ 94 */ 95 /** 96 * @} 97 */ 98 /* Exported types ------------------------------------------------------------*/ 99 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures 100 * @{ 101 */ 102 103 /** 104 * @brief UTILS System, AHB and APB buses clock configuration structure definition 105 */ 106 typedef struct 107 {/*Sys clock divider. This clock is derived from the system clock (SYSCLK). 108 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV. */ 109 uint32_t dummy; 110 } LL_UTILS_ClkInitTypeDef; 111 112 /** 113 * @} 114 */ 115 116 /* Exported constants --------------------------------------------------------*/ 117 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants 118 * @{ 119 */ 120 121 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation 122 * @{ 123 */ 124 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ 125 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ 126 /** 127 * @} 128 */ 129 130 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE 131 * @{ 132 */ 133 #define LL_UTILS_PACKAGETYPE_QFN48 0x5F485F48U /*!< QFN48 package type */ 134 #define LL_UTILS_PACKAGETYPE_QFN32 0x5F325F32U /*!< QFN32 package type */ 135 #define LL_UTILS_PACKAGETYPE_CSP49 0xAC49AC49U /*!< CSP49 package type */ 136 137 /** 138 * @} 139 */ 140 /** @defgroup UTILS_EC_RAMSIZE RAM SIZE 141 * @{ 142 */ 143 #define LL_UTILS_RAMSIZE_24K 0x00000000U /*!< 24 kB of RAM available */ 144 #define LL_UTILS_RAMSIZE_32K 0x00000001U /*!< 32 kB of RAM available */ 145 #define LL_UTILS_RAMSIZE_48K 0x00000002U /*!< 48 kB of RAM available */ 146 #define LL_UTILS_RAMSIZE_64K 0x00000003U /*!< 64 kB of RAM available */ 147 /** 148 * @} 149 */ 150 151 152 /** 153 * @} 154 */ 155 156 /* Exported macro ------------------------------------------------------------*/ 157 158 /* Exported functions --------------------------------------------------------*/ 159 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions 160 * @{ 161 */ 162 163 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE 164 * @{ 165 */ 166 /** 167 * @brief Get Word0 of the unique device identifier (UID based on 64 bits) 168 * @retval Word0 of UID64 169 */ LL_GetUID_Word0(void)170__STATIC_INLINE uint32_t LL_GetUID_Word0(void) 171 { 172 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); 173 } 174 175 /** 176 * @brief Get Word1 of the unique device identifier (UID based on 64 bits) 177 * @retval Word1 of UID64 178 */ LL_GetUID_Word1(void)179__STATIC_INLINE uint32_t LL_GetUID_Word1(void) 180 { 181 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); 182 } 183 184 185 /** 186 * @brief Get Flash memory size 187 * @note This bitfield indicates the words number of the device Flash memory expressed. 188 * As an example, 0x7FFF corresponds to 128 Kbytes. 189 * @retval FLASH_SIZE[15:0]: Flash memory size 190 */ LL_GetFlashSize(void)191__STATIC_INLINE uint32_t LL_GetFlashSize(void) 192 { 193 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0x0000FFFFUL); 194 } 195 196 /** 197 * @brief Get RAM memory size 198 * @retval Returned value can be one of the following values: 199 * @arg LL_UTILS_RAMSIZE_24K 200 * @arg LL_UTILS_RAMSIZE_32K 201 * @arg LL_UTILS_RAMSIZE_48K 202 * @arg LL_UTILS_RAMSIZE_64K 203 */ LL_GetRAMSize(void)204 __STATIC_INLINE uint32_t LL_GetRAMSize(void) 205 { 206 __IOM uint32_t tmpreg; 207 #if defined(FLASH_FLASH_SIZE_RAM_SIZE) 208 tmpreg = (READ_REG(*((uint32_t *)RAMSIZE_BASE_ADDRESS)) & FLASH_FLASH_SIZE_RAM_SIZE) >> FLASH_FLASH_SIZE_RAM_SIZE_Pos; 209 210 if (tmpreg == 0) { 211 tmpreg = LL_UTILS_RAMSIZE_32K; 212 } 213 #else 214 tmpreg = LL_UTILS_RAMSIZE_24K; 215 #endif 216 217 return tmpreg; 218 } 219 220 221 /** 222 * @brief Get Package type 223 * @retval Returned value can be one of the following values: 224 * @arg LL_UTILS_PACKAGETYPE_QFN48 225 * @arg LL_UTILS_PACKAGETYPE_QFN32 226 * @arg LL_UTILS_PACKAGETYPE_CSP49 227 * 228 */ LL_GetPackageType(void)229__STATIC_INLINE uint32_t LL_GetPackageType(void) 230 { 231 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU); 232 } 233 234 /** 235 * @brief Get Device version and cut information 236 * @retval DIE_ID register information 237 */ LL_GetDIE_ID(void)238 __STATIC_INLINE uint32_t LL_GetDIE_ID(void) 239 { 240 return (uint32_t)(READ_REG(*((uint32_t *)DEV_ID_BASE_ADDRESS))); 241 } 242 243 /** 244 * @} 245 */ 246 247 /** @defgroup UTILS_LL_EF_DELAY DELAY 248 * @{ 249 */ 250 /** 251 * @brief This function configures the Cortex-M SysTick source of the time base. 252 * @param HCLKFrequency SysClk frequency in Hz 253 * @note When a RTOS is used, it is recommended to avoid changing the SysTick 254 * configuration by calling this function, for a delay use rather osDelay RTOS service. 255 * @param Ticks Number of ticks 256 * @retval None 257 */ 258 LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)259__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) 260 { 261 /* Configure the SysTick to have interrupt in 1ms time base */ 262 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ 263 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 264 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 265 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ 266 } 267 268 void LL_Init1msTick(uint32_t HCLKFrequency); 269 270 void LL_mDelay(uint32_t Delay); 271 272 /** 273 * @} 274 */ 275 276 /** @defgroup UTILS_EF_SYSTEM SYSTEM 277 * @{ 278 */ 279 280 void LL_SetSystemCoreClock(uint32_t HCLKFrequency); 281 uint32_t LL_GetSystemCoreClock(void); 282 283 284 /** 285 * @} 286 */ 287 288 /** 289 * @} 290 */ 291 292 /** 293 * @} 294 */ 295 296 /** 297 * @} 298 */ 299 300 #ifdef __cplusplus 301 } 302 #endif 303 304 #endif /* STM32WB0x_LL_UTILS_H */ 305
