Searched refs:LL_RCC_ADC12_CLKSRC_PLL_DIV_4 (Results 1 – 1 of 1) sorted by relevance
500 #define LL_RCC_ADC12_CLKSRC_PLL_DIV_4 (uint32_t)((RCC_CFGR2_ADCPRE12 << 16U) | RCC_CFGR2_ADCPRE1… macro541 #define LL_RCC_ADC12_CLKSRC_PLL_DIV_4 RCC_CFGR2_ADCPRE12_DIV4 /*!< ADC12 PLL clock divided by … macro