1 /**
2 ******************************************************************************
3 * @file stm32wb0x_ll_system.h
4 * @author MCD Application Team
5 * @brief Header file of SYSTEM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2024 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL SYSTEM driver contains a set of generic APIs that can be
23 used by user:
24 (+) Some of the FLASH features need to be handled in the SYSTEM file.
25 (+) Access to SYSCFG registers
26
27 @endverbatim
28 ******************************************************************************
29 */
30
31 /* Define to prevent recursive inclusion -------------------------------------*/
32 #ifndef STM32WB0x_LL_SYSTEM_H
33 #define STM32WB0x_LL_SYSTEM_H
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /* Includes ------------------------------------------------------------------*/
40 #include "stm32wb0x.h"
41
42 /** @addtogroup STM32WB0x_LL_Driver
43 * @{
44 */
45
46 #if defined (FLASH) || defined (SYSCFG)
47
48 /** @defgroup SYSTEM_LL SYSTEM
49 * @{
50 */
51
52 /* Private types -------------------------------------------------------------*/
53 /* Private variables ---------------------------------------------------------*/
54
55 /* Private constants ---------------------------------------------------------*/
56 /** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
57 * @{
58 */
59
60 /**
61 * @}
62 */
63
64 /* Private macros ------------------------------------------------------------*/
65
66 /* Exported types ------------------------------------------------------------*/
67 #if defined(USE_FULL_LL_DRIVER)
68 /** @defgroup SYSCFG_IO_LL_ES_INIT SYSCFG IO Exported Init structure
69 * @{
70 */
71 typedef struct
72 {
73
74 uint32_t Line; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range PA0 to PB15
75 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
76
77 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
78 This parameter can be set either to ENABLE or DISABLE */
79
80 uint8_t Type; /*!< Specifies the type for the EXTI lines EDGE or LEVEL.
81 This parameter can be a value of @ref EXTI_LL_EC_TYPE. */
82
83 uint8_t Trigger; /*!< Specifies the trigger signal active edge/level for the EXTI lines.
84 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
85 } LL_SYSCFG_IO_InitTypeDef;
86
87 /**
88 * @}
89 */
90 #endif /*USE_FULL_LL_DRIVER*/
91
92 /* Exported constants --------------------------------------------------------*/
93 /** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
94 * @{
95 */
96
97 /** @defgroup SYSTEM_LL_EC_REMAP SYSCFG REMAP
98 * @{
99 */
100 #define LL_SYSCFG_REMAP_FLASH 0x00000000U /*!< Main Flash memory mapped at 0x00000000 */
101 #define LL_SYSCFG_REMAP_SRAM FLASH_CONFIG_REMAP /*!< SRAM mapped at 0x00000000 */
102 /**
103 * @}
104 */
105
106 /** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS
107 * @{
108 */
109 #if defined(SYSCFG_I2C_FMP_CTRL_I2C1_PA0_FMP)
110 #define LL_SYSCFG_I2C_FASTMODEPLUS_PA0 SYSCFG_I2C_FMP_CTRL_I2C1_PA0_FMP /*!< Enable Fast Mode Plus on PA0 */
111 #endif
112 #if defined(SYSCFG_I2C_FMP_CTRL_I2C1_PA1_FMP)
113 #define LL_SYSCFG_I2C_FASTMODEPLUS_PA1 SYSCFG_I2C_FMP_CTRL_I2C1_PA1_FMP /*!< Enable Fast Mode Plus on PA1 */
114 #endif
115 #if defined(SYSCFG_I2C_FMP_CTRL_I2C1_PB6_FMP)
116 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_I2C_FMP_CTRL_I2C1_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
117 #endif
118 #if defined(SYSCFG_I2C_FMP_CTRL_I2C1_PB7_FMP)
119 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_I2C_FMP_CTRL_I2C1_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
120 #endif
121
122 #if defined(SYSCFG_I2C_FMP_CTRL_I2C2_PB6_FMP)
123 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_I2C_FMP_CTRL_I2C2_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
124 #endif
125 #if defined(SYSCFG_I2C_FMP_CTRL_I2C2_PB7_FMP)
126 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_I2C_FMP_CTRL_I2C2_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
127 #endif
128 /**
129 * @}
130 */
131
132 /** @defgroup SYSTEM_LL_PWRC_IM SYSCFG Power Controller Interrupt MASK
133 * @{
134 */
135 #define LL_SYSCFG_PWRC_PVD SYSCFG_PWRC_IER_PVD_IE /*!< PVD interrupt mask */
136 #define LL_SYSCFG_PWRC_WKUP SYSCFG_PWRC_IER_WKUP_IE /*!< WKUP interrupt mask */
137 /**
138 * @}
139 */
140
141 /** @defgroup SYSCFG_LL_RXTX_DET_TYPE SYSCFG BLE Tx/Rx sequence information detection type
142 * @{
143 */
144 #define LL_SYSCFG_BLERXTX_DET_TYPE_EDGE ((uint8_t)0x00U) /*!< Tx/Rx detection type EDGE */
145 #define LL_SYSCFG_BLERXTX_DET_TYPE_LEVEL ((uint8_t)0x01U) /*!< Tx/Rx detection type LEVEL */
146 /**
147 * @}
148 */
149
150 /** @defgroup SYSCFG_LL_RXTX_EDGE_TRIGGER SYSCFG BLE Tx/Rx detection trigger
151 * @{
152 */
153 #define LL_SYSCFG_BLERXTX_TRIGGER_RISING_EDGE ((uint8_t)0x00U) /*!< Trigger on Rising Edge */
154 #define LL_SYSCFG_BLERXTX_TRIGGER_FALLING_EDGE ((uint8_t)0x01U) /*!< Trigger on Falling Edge */
155 #define LL_SYSCFG_BLERXTX_TRIGGER_BOTH_EDGE ((uint8_t)0x02U) /*!< Trigger on Both Edge */
156 #define LL_SYSCFG_BLERXTX_TRIGGER_LOW_LEVEL ((uint8_t)0x03U) /*!< Trigger on Low Level */
157 #define LL_SYSCFG_BLERXTX_TRIGGER_HIGH_LEVEL ((uint8_t)0x04U) /*!< Trigger on High Level */
158
159 /**
160 * @}
161 */
162
163 /** @defgroup SYSCFG_LL_TX_RX_EVENT_ENABLE SYSCFG BLE Tx/Rx event
164 * @{
165 */
166 #define LL_SYSCFG_BLE_TX_EVENT SYSCFG_BLERXTX_IER_TX_IE /*!< Tx Event Enable */
167 #define LL_SYSCFG_BLE_RX_EVENT SYSCFG_BLERXTX_IER_RX_IE /*!< Rx Event Enable */
168 #if defined(SYSCFG_BLERXTX_ISCR_RX_ISEDGE)
169 #define LL_SYSCFG_BLE_RX_FALLING_EDGE_EVENT (0x00000000U) /*!< Falling edge on RX sequence detected */
170 #define LL_SYSCFG_BLE_RX_RISING_EDGE_EVENT (SYSCFG_BLERXTX_ISCR_RX_ISEDGE) /*!< Rising edge on RX sequence detected */
171 #endif
172 #if defined(SYSCFG_BLERXTX_ISCR_TX_ISEDGE)
173 #define LL_SYSCFG_BLE_TX_FALLING_EDGE_EVENT (0x00000000U) /*!< Falling edge on TX sequence detected */
174 #define LL_SYSCFG_BLE_TX_RISING_EDGE_EVENT (SYSCFG_BLERXTX_ISCR_TX_ISEDGE) /*!< Rising edge on TX sequence detected */
175 #endif
176 /**
177 * @}
178 */
179
180 /** @defgroup SYSTEM_LL_EC_FLASH_WAIT_STATE FLASH Wait States
181 * @{
182 */
183 #define LL_FLASH_WAIT_STATES_0 0x00000000U /*!< FLASH Zero wait state */
184 #define LL_FLASH_WAIT_STATES_1 FLASH_CONFIG_WAIT_STATES_0 /*!< FLASH One wait state */
185 /**
186 * @}
187 */
188
189 /** @defgroup SYSTEM_LL_EC_FLASH_INTERRUPT FLASH Interrupts Definition
190 * @brief FLASH Interrupt definition
191 * @{
192 */
193 #define LL_FLASH_IT_CMDDONE FLASH_IRQMASK_CMDDONEM /*!< FLASH command done Interrupt source */
194 #define LL_FLASH_IT_CMDSTART FLASH_IRQMASK_CMDSTARTM /*!< FLASH command started Interrupt source */
195 #define LL_FLASH_IT_CMDERR FLASH_IRQMASK_CMDERRM /*!< FLASH command error Interrupt source */
196 #define LL_FLASH_IT_ILLCMD FLASH_IRQMASK_ILLCMDM /*!< FLASH illegal command Interrupt source */
197
198 /**
199 * @}
200 */
201
202 /** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
203 * @{
204 */
205 #define LL_FLASH_LATENCY_0 0x00000000U /*!< FLASH Zero wait state */
206 #define LL_FLASH_LATENCY_1 FLASH_CONFIG_WAIT_STATES_0 /*!< FLASH One wait state when system clock frequency is 64 MHz */
207 /**
208 * @}
209 */
210
211 /** @defgroup SYSTEM_LL_EC_IO_DTR EXTI Lines
212 * @{
213 */
214 #define LL_EXTI_LINE_PA0 SYSCFG_IO_DTR_PA0_DT /*!< PA0 */
215 #define LL_EXTI_LINE_PA1 SYSCFG_IO_DTR_PA1_DT /*!< PA1 */
216 #define LL_EXTI_LINE_PA2 SYSCFG_IO_DTR_PA2_DT /*!< PA2 */
217 #define LL_EXTI_LINE_PA3 SYSCFG_IO_DTR_PA3_DT /*!< PA3 */
218 #if defined (STM32WB06) || defined (STM32WB07)
219 #define LL_EXTI_LINE_PA4 SYSCFG_IO_DTR_PA4_DT /*!< PA4 */
220 #define LL_EXTI_LINE_PA5 SYSCFG_IO_DTR_PA5_DT /*!< PA5 */
221 #define LL_EXTI_LINE_PA6 SYSCFG_IO_DTR_PA6_DT /*!< PA6 */
222 #define LL_EXTI_LINE_PA7 SYSCFG_IO_DTR_PA7_DT /*!< PA7 */
223 #endif
224 #define LL_EXTI_LINE_PA8 SYSCFG_IO_DTR_PA8_DT /*!< PA8 */
225 #define LL_EXTI_LINE_PA9 SYSCFG_IO_DTR_PA9_DT /*!< PA9 */
226 #define LL_EXTI_LINE_PA10 SYSCFG_IO_DTR_PA10_DT /*!< PA10 */
227 #define LL_EXTI_LINE_PA11 SYSCFG_IO_DTR_PA11_DT /*!< PA11 */
228 #if defined (STM32WB06) || defined (STM32WB07)
229 #define LL_EXTI_LINE_PA12 SYSCFG_IO_DTR_PA12_DT /*!< PA12 */
230 #define LL_EXTI_LINE_PA13 SYSCFG_IO_DTR_PA13_DT /*!< PA13 */
231 #define LL_EXTI_LINE_PA14 SYSCFG_IO_DTR_PA14_DT /*!< PA14 */
232 #define LL_EXTI_LINE_PA15 SYSCFG_IO_DTR_PA15_DT /*!< PA15 */
233 #endif
234 #define LL_EXTI_LINE_PB0 SYSCFG_IO_DTR_PB0_DT /*!< PB0 */
235 #define LL_EXTI_LINE_PB1 SYSCFG_IO_DTR_PB1_DT /*!< PB1 */
236 #define LL_EXTI_LINE_PB2 SYSCFG_IO_DTR_PB2_DT /*!< PB2 */
237 #define LL_EXTI_LINE_PB3 SYSCFG_IO_DTR_PB3_DT /*!< PB3 */
238 #define LL_EXTI_LINE_PB4 SYSCFG_IO_DTR_PB4_DT /*!< PB4 */
239 #define LL_EXTI_LINE_PB5 SYSCFG_IO_DTR_PB5_DT /*!< PB5 */
240 #define LL_EXTI_LINE_PB6 SYSCFG_IO_DTR_PB6_DT /*!< PB6 */
241 #define LL_EXTI_LINE_PB7 SYSCFG_IO_DTR_PB7_DT /*!< PB7 */
242 #if defined (STM32WB06) || defined (STM32WB07)
243 #define LL_EXTI_LINE_PB8 SYSCFG_IO_DTR_PB8_DT /*!< PB8 */
244 #define LL_EXTI_LINE_PB9 SYSCFG_IO_DTR_PB9_DT /*!< PB9 */
245 #define LL_EXTI_LINE_PB10 SYSCFG_IO_DTR_PB10_DT /*!< PB10 */
246 #define LL_EXTI_LINE_PB11 SYSCFG_IO_DTR_PB11_DT /*!< PB11 */
247 #endif
248 #define LL_EXTI_LINE_PB12 SYSCFG_IO_DTR_PB12_DT /*!< PB12 */
249 #define LL_EXTI_LINE_PB13 SYSCFG_IO_DTR_PB13_DT /*!< PB13 */
250 #define LL_EXTI_LINE_PB14 SYSCFG_IO_DTR_PB14_DT /*!< PB14 */
251 #define LL_EXTI_LINE_PB15 SYSCFG_IO_DTR_PB15_DT /*!< PB15 */
252 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All the PA0...PB15 */
253
254 #if defined(USE_FULL_LL_DRIVER)
255 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< */
256 #endif /*USE_FULL_LL_DRIVER*/
257
258 /**
259 * @}
260 */
261
262 /** @defgroup SYSTEM_LL_EC_TYPE EXTI Type
263 * @{
264 */
265 #define LL_EXTI_TYPE_EDGE ((uint8_t)0x00U) /*!< Interrupt Type EDGE detection */
266 #define LL_EXTI_TYPE_LEVEL ((uint8_t)0x01U) /*!< Interrupt Type LEVEL detection */
267 /**
268 * @}
269 */
270
271 /** @defgroup SYSTEM_LL_EC_TRIGGER EXTI Edge Trigger
272 * @{
273 */
274 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< Trigger None */
275 #define LL_EXTI_TRIGGER_RISING_EDGE ((uint8_t)0x01U) /*!< Trigger Rising Edge */
276 #define LL_EXTI_TRIGGER_FALLING_EDGE ((uint8_t)0x02U) /*!< Trigger Falling Edge */
277 #define LL_EXTI_TRIGGER_BOTH_EDGE ((uint8_t)0x03U) /*!< Trigger Both Edge */
278 #define LL_EXTI_TRIGGER_LOW_LEVEL ((uint8_t)0x04U) /*!< Trigger Low Level */
279 #define LL_EXTI_TRIGGER_HIGH_LEVEL ((uint8_t)0x05U) /*!< Trigger High Level */
280 /**
281 * @}
282 */
283
284 /** @defgroup SYSTEM_LL_DEVICE_INFORMATION Device Version Information
285 * @{
286 */
287 #define LL_BLUENRG_LP_CUT_10 0x10
288 #define LL_BLUENRG_LP_CUT_20 0x20
289
290 /**
291 * @}
292 */
293 /**
294 * @}
295 */
296
297 /* Exported macro ------------------------------------------------------------*/
298 /** @defgroup SYSCFG_IO_LL_Exported_Macros SYSCFG Exported Macros
299 * @{
300 */
301
302 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
303 * @{
304 */
305
306 /**
307 * @brief Write a value in SYSCFG register
308 * @param __REG__ Register to be written
309 * @param __VALUE__ Value to be written in the register
310 * @retval None
311 */
312 #define LL_SYSCFG_WriteReg(__REG__, __VALUE__) WRITE_REG(SYSCFG->__REG__, (__VALUE__))
313
314 /**
315 * @brief Read a value in SYSCFG register
316 * @param __REG__ Register to be read
317 * @retval Register value
318 */
319 #define LL_SYSCFG_ReadReg(__REG__) READ_REG(SYSCFG->__REG__)
320 /**
321 * @}
322 */
323
324
325 /**
326 * @}
327 */
328
329 /* Exported functions --------------------------------------------------------*/
330 /** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
331 * @{
332 */
333 /** @defgroup SYSCFG_LL_EC SYSCFG exported Functions
334 * @{
335 */
336
337 /**
338 * @brief Get the device version and cut information.
339 * @rmtoll DIE_ID PRODUCT/VERSION/REVISION LL_SYSCFG_GetDeviceID
340 * @retval Device ID
341 */
LL_SYSCFG_GetDeviceID(void)342 __STATIC_INLINE uint32_t LL_SYSCFG_GetDeviceID(void)
343 {
344 return (uint32_t)READ_REG(SYSCFG->DIE_ID);
345 }
346
347
348 /**
349 * @brief Get the device cut revision (metal fix) information.
350 * @rmtoll DIE_ID REVISION LL_SYSCFG_GetDeviceRevision
351 * @retval Device ID
352 */
LL_SYSCFG_GetDeviceRevision(void)353 __STATIC_INLINE uint32_t LL_SYSCFG_GetDeviceRevision(void)
354 {
355 return (uint32_t)((READ_REG(SYSCFG->DIE_ID) & SYSCFG_DIE_ID_REVISION) >> SYSCFG_DIE_ID_REVISION_Pos);
356 }
357
358 /**
359 * @brief Get the device cut version information.
360 * @rmtoll DIE_ID VERSION LL_SYSCFG_GetDeviceVersion
361 * @retval Device ID
362 */
LL_SYSCFG_GetDeviceVersion(void)363 __STATIC_INLINE uint32_t LL_SYSCFG_GetDeviceVersion(void)
364 {
365 return (uint32_t)((READ_REG(SYSCFG->DIE_ID) & SYSCFG_DIE_ID_VERSION) >> SYSCFG_DIE_ID_VERSION_Pos);
366 }
367
368 /**
369 * @brief Get the JTAG_ID device information.
370 * @rmtoll JTAG_ID LL_SYSCFG_GetDeviceJTAG_ID
371 * @retval Device ID
372 */
LL_SYSCFG_GetDeviceJTAG_ID(void)373 __STATIC_INLINE uint32_t LL_SYSCFG_GetDeviceJTAG_ID(void)
374 {
375 return (uint32_t)READ_REG(SYSCFG->JTAG_ID);
376 }
377
378 /**
379 * @brief Set memory mapping at address 0x00000000
380 * @rmtoll CONFIG REMAP LL_SYSCFG_SetRemapMemory
381 * @param Memory This parameter can be one of the following values:
382 * @arg LL_SYSCFG_REMAP_FLASH
383 * @arg LL_SYSCFG_REMAP_SRAM
384 * @retval None
385 */
LL_SYSCFG_SetRemapMemory(uint32_t Memory)386 __STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory)
387 {
388 MODIFY_REG(FLASH->CONFIG, (FLASH_CONFIG_REMAP), Memory);
389 }
390
391 /**
392 * @brief Get memory mapping at address 0x00000000
393 * @rmtoll CONFIG REMAP LL_SYSCFG_GetRemapMemory
394 * @retval Returned value can be one of the following values:
395 * @arg LL_SYSCFG_REMAP_FLASH
396 * @arg LL_SYSCFG_REMAP_SRAM
397 */
LL_SYSCFG_GetRemapMemory(void)398 __STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void)
399 {
400 uint32_t remap;
401 uint32_t memory_map = LL_SYSCFG_REMAP_FLASH;
402
403 remap = READ_BIT(FLASH->CONFIG, FLASH_CONFIG_REMAP) >> FLASH_CONFIG_REMAP_Pos;
404
405 if (remap == 1)
406 {
407 memory_map = LL_SYSCFG_REMAP_SRAM;
408 }
409 else
410 {
411 memory_map = LL_SYSCFG_REMAP_FLASH;
412 }
413 return memory_map;
414 }
415
416 /**
417 * @brief Enable the I2C fast mode plus driving capability.
418 * @rmtoll I2C_FMP_CTRL I2C1_PAx_FMP/I2C2_PBx_FMP LL_SYSCFG_EnableFastModePlus
419 * @param ConfigFastModePlus This parameter can be a combination of the following values:
420 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA0
421 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA1
422 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB6
423 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB7
424 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB10
425 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB11
426 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA6
427 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA7
428 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA13
429 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA14
430 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB6
431 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB7
432 * @retval None
433 * @note LL_SYSCFG_I2C_FASTMODEPLUS_PB10, LL_SYSCFG_I2C_FASTMODEPLUS_PB11, LL_SYSCFG_I2C_FASTMODEPLUS_PA6,
434 * LL_SYSCFG_I2C_FASTMODEPLUS_PA7, LL_SYSCFG_I2C_FASTMODEPLUS_PA13 and LL_SYSCFG_I2C_FASTMODEPLUS_PA14
435 */
LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)436 __STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
437 {
438 SET_BIT(SYSCFG->I2C_FMP_CTRL, ConfigFastModePlus);
439 }
440
441 /**
442 * @brief Disable the I2C fast mode plus driving capability.
443 * @rmtoll I2C_FMP_CTRL I2C1_PAx_FMP/I2C2_PBx_FMP LL_SYSCFG_DisableFastModePlus
444 * @param ConfigFastModePlus This parameter can be a combination of the following values:
445 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA0
446 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA1
447 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB6
448 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB7
449 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB10
450 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB11
451 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA6
452 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA7
453 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA13
454 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PA14
455 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB6
456 * @arg LL_SYSCFG_I2C_FASTMODEPLUS_PB7
457 * @retval None
458 * @note LL_SYSCFG_I2C_FASTMODEPLUS_PB10, LL_SYSCFG_I2C_FASTMODEPLUS_PB11, LL_SYSCFG_I2C_FASTMODEPLUS_PA6,
459 * LL_SYSCFG_I2C_FASTMODEPLUS_PA7, LL_SYSCFG_I2C_FASTMODEPLUS_PA13 and LL_SYSCFG_I2C_FASTMODEPLUS_PA14
460 */
LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)461 __STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)
462 {
463 CLEAR_BIT(SYSCFG->I2C_FMP_CTRL, ConfigFastModePlus);
464 }
465 /**
466 * @}
467 */
468
469 /** @defgroup SYSTEM_LL_PWRC SYSCFG Power Functions
470 * @{
471 */
472
473 /**
474 * @brief Enable PWRC Interrupt Mask
475 * @rmtoll PWRC_IER LL_SYSCFG_PWRC_EnableIT
476 * @param Interrupt This parameter can be a combination of the following values:
477 * @arg LL_SYSCFG_PWRC_PVD
478 * @arg LL_SYSCFG_PWRC_WKUP
479 * @retval None
480 */
LL_SYSCFG_PWRC_EnableIT(uint32_t Interrupt)481 __STATIC_INLINE void LL_SYSCFG_PWRC_EnableIT(uint32_t Interrupt)
482 {
483 SET_BIT(SYSCFG->PWRC_IER, Interrupt);
484 }
485
486 /**
487 * @brief Disable PWRC Interrupt Mask
488 * @rmtoll PWRC_IER LL_SYSCFG_PWRC_DisableIT
489 * @param Interrupt This parameter can be a combination of the following values:
490 * @arg LL_SYSCFG_PWRC_PVD
491 * @arg LL_SYSCFG_PWRC_WKUP
492 * @retval None
493 */
LL_SYSCFG_PWRC_DisableIT(uint32_t Interrupt)494 __STATIC_INLINE void LL_SYSCFG_PWRC_DisableIT(uint32_t Interrupt)
495 {
496 CLEAR_BIT(SYSCFG->PWRC_IER, Interrupt);
497 }
498
499 /**
500 * @brief Indicate if PWRC Interrupt Mask is enabled
501 * @rmtoll PWRC_IER LL_SYSCFG_PWRC_IsEnabledIT
502 * @param Interrupt This parameter can be a combination of the following values:
503 * @arg LL_SYSCFG_PWRC_PVD
504 * @arg LL_SYSCFG_PWRC_WKUP
505 * @retval State of bit (1 or 0).
506 */
LL_SYSCFG_PWRC_IsEnabledIT(uint32_t Interrupt)507 __STATIC_INLINE uint32_t LL_SYSCFG_PWRC_IsEnabledIT(uint32_t Interrupt)
508 {
509 return ((READ_BIT(SYSCFG->PWRC_IER, Interrupt) == (Interrupt)) ? 1UL : 0UL);
510 }
511
512 /**
513 * @brief Get PWRC Interrupt Status
514 * @rmtoll PWRC_ISCR LL_SYSCFG_PWRC_GetStatusIT
515 * @param Interrupt This parameter can be a combination of the following values:
516 * @arg LL_SYSCFG_PWRC_PVD
517 * @arg LL_SYSCFG_PWRC_WKUP
518 * @retval State of bit (1 or 0).
519 */
LL_SYSCFG_PWRC_GetStatusIT(uint32_t Interrupt)520 __STATIC_INLINE uint32_t LL_SYSCFG_PWRC_GetStatusIT(uint32_t Interrupt)
521 {
522 return ((READ_BIT(SYSCFG->PWRC_ISCR, Interrupt) == (Interrupt)) ? 1UL : 0UL);
523 }
524
525 /**
526 * @brief Clear PWRC Interrupt Status
527 * @rmtoll PWRC_ISCR LL_SYSCFG_PWRC_ClearIT
528 * @param Interrupt This parameter can be a combination of the following values:
529 * @arg LL_SYSCFG_PWRC_PVD
530 * @arg LL_SYSCFG_PWRC_WKUP
531 * @retval None
532 */
LL_SYSCFG_PWRC_ClearIT(uint32_t Interrupt)533 __STATIC_INLINE void LL_SYSCFG_PWRC_ClearIT(uint32_t Interrupt)
534 {
535 SET_BIT(SYSCFG->PWRC_ISCR, Interrupt);
536 }
537
538 /**
539 * @}
540 */
541
542 /** @defgroup SYSCFG_IO_LL_Exported_Functions EXTI Exported Functions
543 * @{
544 */
545 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
546 * @{
547 */
548
549 /**
550 * @brief Enable IO Interrupt for Lines in range PA0... PB15
551 * @rmtoll IO_IER LL_EXTI_EnableIT
552 * @param ExtiLine This parameter can be a combination of the following values:
553 * @arg @ref LL_EXTI_LINE_PA0
554 * @arg @ref LL_EXTI_LINE_PA1
555 * @arg @ref LL_EXTI_LINE_PA2
556 * @arg @ref LL_EXTI_LINE_PA3
557 * @arg @ref LL_EXTI_LINE_PA4
558 * @arg @ref LL_EXTI_LINE_PA5
559 * @arg @ref LL_EXTI_LINE_PA6
560 * @arg @ref LL_EXTI_LINE_PA7
561 * @arg @ref LL_EXTI_LINE_PA8
562 * @arg @ref LL_EXTI_LINE_PA9
563 * @arg @ref LL_EXTI_LINE_PA10
564 * @arg @ref LL_EXTI_LINE_PA11
565 * @arg @ref LL_EXTI_LINE_PA12
566 * @arg @ref LL_EXTI_LINE_PA13
567 * @arg @ref LL_EXTI_LINE_PA14
568 * @arg @ref LL_EXTI_LINE_PA15
569 * @arg @ref LL_EXTI_LINE_PB0
570 * @arg @ref LL_EXTI_LINE_PB1
571 * @arg @ref LL_EXTI_LINE_PB2
572 * @arg @ref LL_EXTI_LINE_PB3
573 * @arg @ref LL_EXTI_LINE_PB4
574 * @arg @ref LL_EXTI_LINE_PB5
575 * @arg @ref LL_EXTI_LINE_PB6
576 * @arg @ref LL_EXTI_LINE_PB7
577 * @arg @ref LL_EXTI_LINE_PB8
578 * @arg @ref LL_EXTI_LINE_PB9
579 * @arg @ref LL_EXTI_LINE_PB10
580 * @arg @ref LL_EXTI_LINE_PB11
581 * @arg @ref LL_EXTI_LINE_PB12
582 * @arg @ref LL_EXTI_LINE_PB13
583 * @arg @ref LL_EXTI_LINE_PB14
584 * @arg @ref LL_EXTI_LINE_PB15
585 * @arg @ref LL_EXTI_LINE_ALL
586 * @retval None
587 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
588 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
589 */
LL_EXTI_EnableIT(uint32_t ExtiLine)590 __STATIC_INLINE void LL_EXTI_EnableIT(uint32_t ExtiLine)
591 {
592 SET_BIT(SYSCFG->IO_IER, ExtiLine);
593 }
594
595 /**
596 * @brief Disable IO Interrupt for Lines in range PA0... PB15
597 * @rmtoll IO_IER LL_EXTI_DisableIT
598 * @param ExtiLine This parameter can be a combination of the following values:
599 * @arg @ref LL_EXTI_LINE_PA0
600 * @arg @ref LL_EXTI_LINE_PA1
601 * @arg @ref LL_EXTI_LINE_PA2
602 * @arg @ref LL_EXTI_LINE_PA3
603 * @arg @ref LL_EXTI_LINE_PA4
604 * @arg @ref LL_EXTI_LINE_PA5
605 * @arg @ref LL_EXTI_LINE_PA6
606 * @arg @ref LL_EXTI_LINE_PA7
607 * @arg @ref LL_EXTI_LINE_PA8
608 * @arg @ref LL_EXTI_LINE_PA9
609 * @arg @ref LL_EXTI_LINE_PA10
610 * @arg @ref LL_EXTI_LINE_PA11
611 * @arg @ref LL_EXTI_LINE_PA12
612 * @arg @ref LL_EXTI_LINE_PA13
613 * @arg @ref LL_EXTI_LINE_PA14
614 * @arg @ref LL_EXTI_LINE_PA15
615 * @arg @ref LL_EXTI_LINE_PB0
616 * @arg @ref LL_EXTI_LINE_PB1
617 * @arg @ref LL_EXTI_LINE_PB2
618 * @arg @ref LL_EXTI_LINE_PB3
619 * @arg @ref LL_EXTI_LINE_PB4
620 * @arg @ref LL_EXTI_LINE_PB5
621 * @arg @ref LL_EXTI_LINE_PB6
622 * @arg @ref LL_EXTI_LINE_PB7
623 * @arg @ref LL_EXTI_LINE_PB8
624 * @arg @ref LL_EXTI_LINE_PB9
625 * @arg @ref LL_EXTI_LINE_PB10
626 * @arg @ref LL_EXTI_LINE_PB11
627 * @arg @ref LL_EXTI_LINE_PB12
628 * @arg @ref LL_EXTI_LINE_PB13
629 * @arg @ref LL_EXTI_LINE_PB14
630 * @arg @ref LL_EXTI_LINE_PB15
631 * @arg @ref LL_EXTI_LINE_ALL
632 * @retval None
633 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
634 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
635 */
LL_EXTI_DisableIT(uint32_t ExtiLine)636 __STATIC_INLINE void LL_EXTI_DisableIT(uint32_t ExtiLine)
637 {
638 CLEAR_BIT(SYSCFG->IO_IER, ExtiLine);
639 }
640
641 /**
642 * @brief Indicate if IO Interrupt Mask is enabled for Lines in range PA0... PB15
643 * @rmtoll IO_IER LL_EXTI_IsEnabledIT
644 * @param ExtiLine This parameter can be one of the following values:
645 * @arg @ref LL_EXTI_LINE_PA0
646 * @arg @ref LL_EXTI_LINE_PA1
647 * @arg @ref LL_EXTI_LINE_PA2
648 * @arg @ref LL_EXTI_LINE_PA3
649 * @arg @ref LL_EXTI_LINE_PA4
650 * @arg @ref LL_EXTI_LINE_PA5
651 * @arg @ref LL_EXTI_LINE_PA6
652 * @arg @ref LL_EXTI_LINE_PA7
653 * @arg @ref LL_EXTI_LINE_PA8
654 * @arg @ref LL_EXTI_LINE_PA9
655 * @arg @ref LL_EXTI_LINE_PA10
656 * @arg @ref LL_EXTI_LINE_PA11
657 * @arg @ref LL_EXTI_LINE_PA12
658 * @arg @ref LL_EXTI_LINE_PA13
659 * @arg @ref LL_EXTI_LINE_PA14
660 * @arg @ref LL_EXTI_LINE_PA15
661 * @arg @ref LL_EXTI_LINE_PB0
662 * @arg @ref LL_EXTI_LINE_PB1
663 * @arg @ref LL_EXTI_LINE_PB2
664 * @arg @ref LL_EXTI_LINE_PB3
665 * @arg @ref LL_EXTI_LINE_PB4
666 * @arg @ref LL_EXTI_LINE_PB5
667 * @arg @ref LL_EXTI_LINE_PB6
668 * @arg @ref LL_EXTI_LINE_PB7
669 * @arg @ref LL_EXTI_LINE_PB8
670 * @arg @ref LL_EXTI_LINE_PB9
671 * @arg @ref LL_EXTI_LINE_PB10
672 * @arg @ref LL_EXTI_LINE_PB11
673 * @arg @ref LL_EXTI_LINE_PB12
674 * @arg @ref LL_EXTI_LINE_PB13
675 * @arg @ref LL_EXTI_LINE_PB14
676 * @arg @ref LL_EXTI_LINE_PB15
677 * @arg @ref LL_EXTI_LINE_ALL
678 * @retval State of bit (1 or 0).
679 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
680 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
681 */
LL_EXTI_IsEnabledIT(uint32_t ExtiLine)682 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT(uint32_t ExtiLine)
683 {
684 return ((READ_BIT(SYSCFG->IO_IER, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
685 }
686
687 /**
688 * @}
689 */
690
691 /** @defgroup EXTI_LL_EF_TYPE_Management Level/Edge Management
692 * @{
693 */
694
695 /**
696 * @brief Set IO Interrupt Type for Lines in range PA0... PB15
697 * @rmtoll IO_DTR LL_EXTI_EnableEdgeDetection
698 * @param ExtiLine This parameter can be a combination of the following values:
699 * @arg @ref LL_EXTI_LINE_PA0
700 * @arg @ref LL_EXTI_LINE_PA1
701 * @arg @ref LL_EXTI_LINE_PA2
702 * @arg @ref LL_EXTI_LINE_PA3
703 * @arg @ref LL_EXTI_LINE_PA4
704 * @arg @ref LL_EXTI_LINE_PA5
705 * @arg @ref LL_EXTI_LINE_PA6
706 * @arg @ref LL_EXTI_LINE_PA7
707 * @arg @ref LL_EXTI_LINE_PA8
708 * @arg @ref LL_EXTI_LINE_PA9
709 * @arg @ref LL_EXTI_LINE_PA10
710 * @arg @ref LL_EXTI_LINE_PA11
711 * @arg @ref LL_EXTI_LINE_PA12
712 * @arg @ref LL_EXTI_LINE_PA13
713 * @arg @ref LL_EXTI_LINE_PA14
714 * @arg @ref LL_EXTI_LINE_PA15
715 * @arg @ref LL_EXTI_LINE_PB0
716 * @arg @ref LL_EXTI_LINE_PB1
717 * @arg @ref LL_EXTI_LINE_PB2
718 * @arg @ref LL_EXTI_LINE_PB3
719 * @arg @ref LL_EXTI_LINE_PB4
720 * @arg @ref LL_EXTI_LINE_PB5
721 * @arg @ref LL_EXTI_LINE_PB6
722 * @arg @ref LL_EXTI_LINE_PB7
723 * @arg @ref LL_EXTI_LINE_PB8
724 * @arg @ref LL_EXTI_LINE_PB9
725 * @arg @ref LL_EXTI_LINE_PB10
726 * @arg @ref LL_EXTI_LINE_PB11
727 * @arg @ref LL_EXTI_LINE_PB12
728 * @arg @ref LL_EXTI_LINE_PB13
729 * @arg @ref LL_EXTI_LINE_PB14
730 * @arg @ref LL_EXTI_LINE_PB15
731 * @arg @ref LL_EXTI_LINE_ALL
732 * @retval None
733 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
734 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
735 */
LL_EXTI_EnableEdgeDetection(uint32_t ExtiLine)736 __STATIC_INLINE void LL_EXTI_EnableEdgeDetection(uint32_t ExtiLine)
737 {
738 CLEAR_BIT(SYSCFG->IO_DTR, ExtiLine);
739 }
740
741 /**
742 * @brief Set IO Interrupt Type for Lines in range PA0... PB15
743 * @rmtoll IO_DTR LL_EXTI_DisableEdgeDetection
744 * @param ExtiLine This parameter can be a combination of the following values:
745 * @arg @ref LL_EXTI_LINE_PA0
746 * @arg @ref LL_EXTI_LINE_PA1
747 * @arg @ref LL_EXTI_LINE_PA2
748 * @arg @ref LL_EXTI_LINE_PA3
749 * @arg @ref LL_EXTI_LINE_PA4
750 * @arg @ref LL_EXTI_LINE_PA5
751 * @arg @ref LL_EXTI_LINE_PA6
752 * @arg @ref LL_EXTI_LINE_PA7
753 * @arg @ref LL_EXTI_LINE_PA8
754 * @arg @ref LL_EXTI_LINE_PA9
755 * @arg @ref LL_EXTI_LINE_PA10
756 * @arg @ref LL_EXTI_LINE_PA11
757 * @arg @ref LL_EXTI_LINE_PA12
758 * @arg @ref LL_EXTI_LINE_PA13
759 * @arg @ref LL_EXTI_LINE_PA14
760 * @arg @ref LL_EXTI_LINE_PA15
761 * @arg @ref LL_EXTI_LINE_PB0
762 * @arg @ref LL_EXTI_LINE_PB1
763 * @arg @ref LL_EXTI_LINE_PB2
764 * @arg @ref LL_EXTI_LINE_PB3
765 * @arg @ref LL_EXTI_LINE_PB4
766 * @arg @ref LL_EXTI_LINE_PB5
767 * @arg @ref LL_EXTI_LINE_PB6
768 * @arg @ref LL_EXTI_LINE_PB7
769 * @arg @ref LL_EXTI_LINE_PB8
770 * @arg @ref LL_EXTI_LINE_PB9
771 * @arg @ref LL_EXTI_LINE_PB10
772 * @arg @ref LL_EXTI_LINE_PB11
773 * @arg @ref LL_EXTI_LINE_PB12
774 * @arg @ref LL_EXTI_LINE_PB13
775 * @arg @ref LL_EXTI_LINE_PB14
776 * @arg @ref LL_EXTI_LINE_PB15
777 * @arg @ref LL_EXTI_LINE_ALL
778 * @retval None
779 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
780 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
781 */
LL_EXTI_DisableEdgeDetection(uint32_t ExtiLine)782 __STATIC_INLINE void LL_EXTI_DisableEdgeDetection(uint32_t ExtiLine)
783 {
784 SET_BIT(SYSCFG->IO_DTR, ExtiLine);
785 }
786
787 /**
788 * @brief Get IO Interrupt Type for Lines in range PA0... PB15
789 * @rmtoll IO_DTR LL_EXTI_IsEnabledEdgeDetection
790 * @param ExtiLine This parameter can be one of the following values:
791 * @arg @ref LL_EXTI_LINE_PA0
792 * @arg @ref LL_EXTI_LINE_PA1
793 * @arg @ref LL_EXTI_LINE_PA2
794 * @arg @ref LL_EXTI_LINE_PA3
795 * @arg @ref LL_EXTI_LINE_PA4
796 * @arg @ref LL_EXTI_LINE_PA5
797 * @arg @ref LL_EXTI_LINE_PA6
798 * @arg @ref LL_EXTI_LINE_PA7
799 * @arg @ref LL_EXTI_LINE_PA8
800 * @arg @ref LL_EXTI_LINE_PA9
801 * @arg @ref LL_EXTI_LINE_PA10
802 * @arg @ref LL_EXTI_LINE_PA11
803 * @arg @ref LL_EXTI_LINE_PA12
804 * @arg @ref LL_EXTI_LINE_PA13
805 * @arg @ref LL_EXTI_LINE_PA14
806 * @arg @ref LL_EXTI_LINE_PA15
807 * @arg @ref LL_EXTI_LINE_PB0
808 * @arg @ref LL_EXTI_LINE_PB1
809 * @arg @ref LL_EXTI_LINE_PB2
810 * @arg @ref LL_EXTI_LINE_PB3
811 * @arg @ref LL_EXTI_LINE_PB4
812 * @arg @ref LL_EXTI_LINE_PB5
813 * @arg @ref LL_EXTI_LINE_PB6
814 * @arg @ref LL_EXTI_LINE_PB7
815 * @arg @ref LL_EXTI_LINE_PB8
816 * @arg @ref LL_EXTI_LINE_PB9
817 * @arg @ref LL_EXTI_LINE_PB10
818 * @arg @ref LL_EXTI_LINE_PB11
819 * @arg @ref LL_EXTI_LINE_PB12
820 * @arg @ref LL_EXTI_LINE_PB13
821 * @arg @ref LL_EXTI_LINE_PB14
822 * @arg @ref LL_EXTI_LINE_PB15
823 * @arg @ref LL_EXTI_LINE_ALL
824 al One of the following values:
825 * @arg @ref LL_EXTI_TYPE_EDGE
826 * @arg @ref LL_EXTI_TYPE_LEVEL
827 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
828 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
829 */
LL_EXTI_IsEnabledEdgeDetection(uint32_t ExtiLine)830 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEdgeDetection(uint32_t ExtiLine)
831 {
832 return ((READ_BIT(SYSCFG->IO_DTR, ExtiLine) == (ExtiLine)) ? 0UL : 1UL);
833 }
834 /**
835 * @}
836 */
837
838 /** @defgroup EXTI_LL_EF_Trigger_EDGE_Management Trigger_Management
839 * @{
840 */
841
842 /**
843 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range PA0... PB15
844 * @rmtoll IO_IBER LL_EXTI_EnableBothEdgeTrig
845 * @param ExtiLine This parameter can be a combination of the following values:
846 * @arg @ref LL_EXTI_LINE_PA0
847 * @arg @ref LL_EXTI_LINE_PA1
848 * @arg @ref LL_EXTI_LINE_PA2
849 * @arg @ref LL_EXTI_LINE_PA3
850 * @arg @ref LL_EXTI_LINE_PA4
851 * @arg @ref LL_EXTI_LINE_PA5
852 * @arg @ref LL_EXTI_LINE_PA6
853 * @arg @ref LL_EXTI_LINE_PA7
854 * @arg @ref LL_EXTI_LINE_PA8
855 * @arg @ref LL_EXTI_LINE_PA9
856 * @arg @ref LL_EXTI_LINE_PA10
857 * @arg @ref LL_EXTI_LINE_PA11
858 * @arg @ref LL_EXTI_LINE_PA12
859 * @arg @ref LL_EXTI_LINE_PA13
860 * @arg @ref LL_EXTI_LINE_PA14
861 * @arg @ref LL_EXTI_LINE_PA15
862 * @arg @ref LL_EXTI_LINE_PB0
863 * @arg @ref LL_EXTI_LINE_PB1
864 * @arg @ref LL_EXTI_LINE_PB2
865 * @arg @ref LL_EXTI_LINE_PB3
866 * @arg @ref LL_EXTI_LINE_PB4
867 * @arg @ref LL_EXTI_LINE_PB5
868 * @arg @ref LL_EXTI_LINE_PB6
869 * @arg @ref LL_EXTI_LINE_PB7
870 * @arg @ref LL_EXTI_LINE_PB8
871 * @arg @ref LL_EXTI_LINE_PB9
872 * @arg @ref LL_EXTI_LINE_PB10
873 * @arg @ref LL_EXTI_LINE_PB11
874 * @arg @ref LL_EXTI_LINE_PB12
875 * @arg @ref LL_EXTI_LINE_PB13
876 * @arg @ref LL_EXTI_LINE_PB14
877 * @arg @ref LL_EXTI_LINE_PB15
878 * @arg @ref LL_EXTI_LINE_ALL
879 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
880 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
881 * @retval None
882 */
LL_EXTI_EnableBothEdgeTrig(uint32_t ExtiLine)883 __STATIC_INLINE void LL_EXTI_EnableBothEdgeTrig(uint32_t ExtiLine)
884 {
885 SET_BIT(SYSCFG->IO_IBER, ExtiLine);
886 }
887 /**
888 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range PA0... PB15
889 * @rmtoll IBER LL_EXTI_DisableBothEdgeTrig
890 * @param ExtiLine This parameter can be a combination of the following values:
891 * @arg @ref LL_EXTI_LINE_PA0
892 * @arg @ref LL_EXTI_LINE_PA1
893 * @arg @ref LL_EXTI_LINE_PA2
894 * @arg @ref LL_EXTI_LINE_PA3
895 * @arg @ref LL_EXTI_LINE_PA4
896 * @arg @ref LL_EXTI_LINE_PA5
897 * @arg @ref LL_EXTI_LINE_PA6
898 * @arg @ref LL_EXTI_LINE_PA7
899 * @arg @ref LL_EXTI_LINE_PA8
900 * @arg @ref LL_EXTI_LINE_PA9
901 * @arg @ref LL_EXTI_LINE_PA10
902 * @arg @ref LL_EXTI_LINE_PA11
903 * @arg @ref LL_EXTI_LINE_PA12
904 * @arg @ref LL_EXTI_LINE_PA13
905 * @arg @ref LL_EXTI_LINE_PA14
906 * @arg @ref LL_EXTI_LINE_PA15
907 * @arg @ref LL_EXTI_LINE_PB0
908 * @arg @ref LL_EXTI_LINE_PB1
909 * @arg @ref LL_EXTI_LINE_PB2
910 * @arg @ref LL_EXTI_LINE_PB3
911 * @arg @ref LL_EXTI_LINE_PB4
912 * @arg @ref LL_EXTI_LINE_PB5
913 * @arg @ref LL_EXTI_LINE_PB6
914 * @arg @ref LL_EXTI_LINE_PB7
915 * @arg @ref LL_EXTI_LINE_PB8
916 * @arg @ref LL_EXTI_LINE_PB9
917 * @arg @ref LL_EXTI_LINE_PB10
918 * @arg @ref LL_EXTI_LINE_PB11
919 * @arg @ref LL_EXTI_LINE_PB12
920 * @arg @ref LL_EXTI_LINE_PB13
921 * @arg @ref LL_EXTI_LINE_PB14
922 * @arg @ref LL_EXTI_LINE_PB15
923 * @arg @ref LL_EXTI_LINE_ALL
924 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
925 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
926 * @retval None
927 */
928
LL_EXTI_DisableBothEdgeTrig(uint32_t ExtiLine)929 __STATIC_INLINE void LL_EXTI_DisableBothEdgeTrig(uint32_t ExtiLine)
930 {
931 CLEAR_BIT(SYSCFG->IO_IBER, ExtiLine);
932 }
933
934 /**
935 * @brief Check if rising edge trigger is enabled for Lines in range PA0... PB15
936 * @rmtoll IBER LL_EXTI_IsEnabledBothEdgeTrig
937 * @param ExtiLine This parameter can be a combination of the following values:
938 * @arg @ref LL_EXTI_LINE_PA0
939 * @arg @ref LL_EXTI_LINE_PA1
940 * @arg @ref LL_EXTI_LINE_PA2
941 * @arg @ref LL_EXTI_LINE_PA3
942 * @arg @ref LL_EXTI_LINE_PA4
943 * @arg @ref LL_EXTI_LINE_PA5
944 * @arg @ref LL_EXTI_LINE_PA6
945 * @arg @ref LL_EXTI_LINE_PA7
946 * @arg @ref LL_EXTI_LINE_PA8
947 * @arg @ref LL_EXTI_LINE_PA9
948 * @arg @ref LL_EXTI_LINE_PA10
949 * @arg @ref LL_EXTI_LINE_PA11
950 * @arg @ref LL_EXTI_LINE_PA12
951 * @arg @ref LL_EXTI_LINE_PA13
952 * @arg @ref LL_EXTI_LINE_PA14
953 * @arg @ref LL_EXTI_LINE_PA15
954 * @arg @ref LL_EXTI_LINE_PB0
955 * @arg @ref LL_EXTI_LINE_PB1
956 * @arg @ref LL_EXTI_LINE_PB2
957 * @arg @ref LL_EXTI_LINE_PB3
958 * @arg @ref LL_EXTI_LINE_PB4
959 * @arg @ref LL_EXTI_LINE_PB5
960 * @arg @ref LL_EXTI_LINE_PB6
961 * @arg @ref LL_EXTI_LINE_PB7
962 * @arg @ref LL_EXTI_LINE_PB8
963 * @arg @ref LL_EXTI_LINE_PB9
964 * @arg @ref LL_EXTI_LINE_PB10
965 * @arg @ref LL_EXTI_LINE_PB11
966 * @arg @ref LL_EXTI_LINE_PB12
967 * @arg @ref LL_EXTI_LINE_PB13
968 * @arg @ref LL_EXTI_LINE_PB14
969 * @arg @ref LL_EXTI_LINE_PB15
970 * @arg @ref LL_EXTI_LINE_ALL
971 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
972 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
973 * @retval State of bit (1 or 0).
974 */
975
LL_EXTI_IsEnabledBothEdgeTrig(uint32_t ExtiLine)976 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledBothEdgeTrig(uint32_t ExtiLine)
977 {
978 return ((READ_BIT(SYSCFG->IO_IBER, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
979 }
980
981 /**
982 * @}
983 */
984
985 /** @defgroup EXTI_LL_EF_RISING/Falling_Trigger_Management FRISING/Falling_Trigger_Management
986 * @{
987 */
988
989 /**
990 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range PA0... PB15
991 * @rmtoll IO_IEVR LL_EXTI_EnableRisingTrig
992 * @param ExtiLine This parameter can be a combination of the following values:
993 * @arg @ref LL_EXTI_LINE_PA0
994 * @arg @ref LL_EXTI_LINE_PA1
995 * @arg @ref LL_EXTI_LINE_PA2
996 * @arg @ref LL_EXTI_LINE_PA3
997 * @arg @ref LL_EXTI_LINE_PA4
998 * @arg @ref LL_EXTI_LINE_PA5
999 * @arg @ref LL_EXTI_LINE_PA6
1000 * @arg @ref LL_EXTI_LINE_PA7
1001 * @arg @ref LL_EXTI_LINE_PA8
1002 * @arg @ref LL_EXTI_LINE_PA9
1003 * @arg @ref LL_EXTI_LINE_PA10
1004 * @arg @ref LL_EXTI_LINE_PA11
1005 * @arg @ref LL_EXTI_LINE_PA12
1006 * @arg @ref LL_EXTI_LINE_PA13
1007 * @arg @ref LL_EXTI_LINE_PA14
1008 * @arg @ref LL_EXTI_LINE_PA15
1009 * @arg @ref LL_EXTI_LINE_PB0
1010 * @arg @ref LL_EXTI_LINE_PB1
1011 * @arg @ref LL_EXTI_LINE_PB2
1012 * @arg @ref LL_EXTI_LINE_PB3
1013 * @arg @ref LL_EXTI_LINE_PB4
1014 * @arg @ref LL_EXTI_LINE_PB5
1015 * @arg @ref LL_EXTI_LINE_PB6
1016 * @arg @ref LL_EXTI_LINE_PB7
1017 * @arg @ref LL_EXTI_LINE_PB8
1018 * @arg @ref LL_EXTI_LINE_PB9
1019 * @arg @ref LL_EXTI_LINE_PB10
1020 * @arg @ref LL_EXTI_LINE_PB11
1021 * @arg @ref LL_EXTI_LINE_PB12
1022 * @arg @ref LL_EXTI_LINE_PB13
1023 * @arg @ref LL_EXTI_LINE_PB14
1024 * @arg @ref LL_EXTI_LINE_PB15
1025 * @arg @ref LL_EXTI_LINE_ALL
1026 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
1027 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
1028 * @note Please check each device line mapping for EXTI Line availability
1029 * @retval None
1030 */
LL_EXTI_EnableRisingTrig(uint32_t ExtiLine)1031 __STATIC_INLINE void LL_EXTI_EnableRisingTrig(uint32_t ExtiLine)
1032 {
1033 SET_BIT(SYSCFG->IO_IEVR, ExtiLine);
1034 }
1035
1036 /**
1037 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range PA0... PB15
1038 * @rmtoll IO_IEVR LL_EXTI_DisableRisingTrig
1039 * @param ExtiLine This parameter can be a combination of the following values:
1040 * @arg @ref LL_EXTI_LINE_PA0
1041 * @arg @ref LL_EXTI_LINE_PA1
1042 * @arg @ref LL_EXTI_LINE_PA2
1043 * @arg @ref LL_EXTI_LINE_PA3
1044 * @arg @ref LL_EXTI_LINE_PA4
1045 * @arg @ref LL_EXTI_LINE_PA5
1046 * @arg @ref LL_EXTI_LINE_PA6
1047 * @arg @ref LL_EXTI_LINE_PA7
1048 * @arg @ref LL_EXTI_LINE_PA8
1049 * @arg @ref LL_EXTI_LINE_PA9
1050 * @arg @ref LL_EXTI_LINE_PA10
1051 * @arg @ref LL_EXTI_LINE_PA11
1052 * @arg @ref LL_EXTI_LINE_PA12
1053 * @arg @ref LL_EXTI_LINE_PA13
1054 * @arg @ref LL_EXTI_LINE_PA14
1055 * @arg @ref LL_EXTI_LINE_PA15
1056 * @arg @ref LL_EXTI_LINE_PB0
1057 * @arg @ref LL_EXTI_LINE_PB1
1058 * @arg @ref LL_EXTI_LINE_PB2
1059 * @arg @ref LL_EXTI_LINE_PB3
1060 * @arg @ref LL_EXTI_LINE_PB4
1061 * @arg @ref LL_EXTI_LINE_PB5
1062 * @arg @ref LL_EXTI_LINE_PB6
1063 * @arg @ref LL_EXTI_LINE_PB7
1064 * @arg @ref LL_EXTI_LINE_PB8
1065 * @arg @ref LL_EXTI_LINE_PB9
1066 * @arg @ref LL_EXTI_LINE_PB10
1067 * @arg @ref LL_EXTI_LINE_PB11
1068 * @arg @ref LL_EXTI_LINE_PB12
1069 * @arg @ref LL_EXTI_LINE_PB13
1070 * @arg @ref LL_EXTI_LINE_PB14
1071 * @arg @ref LL_EXTI_LINE_PB15
1072 * @arg @ref LL_EXTI_LINE_ALL
1073 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
1074 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
1075 * @retval None
1076 */
LL_EXTI_DisableRisingTrig(uint32_t ExtiLine)1077 __STATIC_INLINE void LL_EXTI_DisableRisingTrig(uint32_t ExtiLine)
1078 {
1079 CLEAR_BIT(SYSCFG->IO_IEVR, ExtiLine);
1080 }
1081
1082 /**
1083 * @brief Check if rising edge trigger is enabled for Lines in range PA0... PB15
1084 * @rmtoll IO_IEVR LL_EXTI_IsEnabledRisingTrig
1085 * @param ExtiLine This parameter can be a combination of the following values:
1086 * @arg @ref LL_EXTI_LINE_PA0
1087 * @arg @ref LL_EXTI_LINE_PA1
1088 * @arg @ref LL_EXTI_LINE_PA2
1089 * @arg @ref LL_EXTI_LINE_PA3
1090 * @arg @ref LL_EXTI_LINE_PA4
1091 * @arg @ref LL_EXTI_LINE_PA5
1092 * @arg @ref LL_EXTI_LINE_PA6
1093 * @arg @ref LL_EXTI_LINE_PA7
1094 * @arg @ref LL_EXTI_LINE_PA8
1095 * @arg @ref LL_EXTI_LINE_PA9
1096 * @arg @ref LL_EXTI_LINE_PA10
1097 * @arg @ref LL_EXTI_LINE_PA11
1098 * @arg @ref LL_EXTI_LINE_PA12
1099 * @arg @ref LL_EXTI_LINE_PA13
1100 * @arg @ref LL_EXTI_LINE_PA14
1101 * @arg @ref LL_EXTI_LINE_PA15
1102 * @arg @ref LL_EXTI_LINE_PB0
1103 * @arg @ref LL_EXTI_LINE_PB1
1104 * @arg @ref LL_EXTI_LINE_PB2
1105 * @arg @ref LL_EXTI_LINE_PB3
1106 * @arg @ref LL_EXTI_LINE_PB4
1107 * @arg @ref LL_EXTI_LINE_PB5
1108 * @arg @ref LL_EXTI_LINE_PB6
1109 * @arg @ref LL_EXTI_LINE_PB7
1110 * @arg @ref LL_EXTI_LINE_PB8
1111 * @arg @ref LL_EXTI_LINE_PB9
1112 * @arg @ref LL_EXTI_LINE_PB10
1113 * @arg @ref LL_EXTI_LINE_PB11
1114 * @arg @ref LL_EXTI_LINE_PB12
1115 * @arg @ref LL_EXTI_LINE_PB13
1116 * @arg @ref LL_EXTI_LINE_PB14
1117 * @arg @ref LL_EXTI_LINE_PB15
1118 * @arg @ref LL_EXTI_LINE_ALL
1119 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
1120 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
1121 * @note Please check each device line mapping for EXTI Line availability
1122 * @retval State of bit (1 or 0).
1123 */
LL_EXTI_IsEnabledRisingTrig(uint32_t ExtiLine)1124 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig(uint32_t ExtiLine)
1125 {
1126 return ((READ_BIT(SYSCFG->IO_IEVR, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1127 }
1128
1129 /**
1130 * @}
1131 */
1132
1133 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1134 * @{
1135 */
1136
1137 /**
1138 * @brief Check if the ExtLine Flag is set or not for Lines in range PA0...PB15
1139 * @rmtoll IO_ISCR LL_EXTI_IsActiveFlag
1140 * @param ExtiLine This parameter can be a combination of the following values:
1141 * @arg @ref LL_EXTI_LINE_PA0
1142 * @arg @ref LL_EXTI_LINE_PA1
1143 * @arg @ref LL_EXTI_LINE_PA2
1144 * @arg @ref LL_EXTI_LINE_PA3
1145 * @arg @ref LL_EXTI_LINE_PA4
1146 * @arg @ref LL_EXTI_LINE_PA5
1147 * @arg @ref LL_EXTI_LINE_PA6
1148 * @arg @ref LL_EXTI_LINE_PA7
1149 * @arg @ref LL_EXTI_LINE_PA8
1150 * @arg @ref LL_EXTI_LINE_PA9
1151 * @arg @ref LL_EXTI_LINE_PA10
1152 * @arg @ref LL_EXTI_LINE_PA11
1153 * @arg @ref LL_EXTI_LINE_PA12
1154 * @arg @ref LL_EXTI_LINE_PA13
1155 * @arg @ref LL_EXTI_LINE_PA14
1156 * @arg @ref LL_EXTI_LINE_PA15
1157 * @arg @ref LL_EXTI_LINE_PB0
1158 * @arg @ref LL_EXTI_LINE_PB1
1159 * @arg @ref LL_EXTI_LINE_PB2
1160 * @arg @ref LL_EXTI_LINE_PB3
1161 * @arg @ref LL_EXTI_LINE_PB4
1162 * @arg @ref LL_EXTI_LINE_PB5
1163 * @arg @ref LL_EXTI_LINE_PB6
1164 * @arg @ref LL_EXTI_LINE_PB7
1165 * @arg @ref LL_EXTI_LINE_PB8
1166 * @arg @ref LL_EXTI_LINE_PB9
1167 * @arg @ref LL_EXTI_LINE_PB10
1168 * @arg @ref LL_EXTI_LINE_PB11
1169 * @arg @ref LL_EXTI_LINE_PB12
1170 * @arg @ref LL_EXTI_LINE_PB13
1171 * @arg @ref LL_EXTI_LINE_PB14
1172 * @arg @ref LL_EXTI_LINE_PB15
1173 * @arg @ref LL_EXTI_LINE_ALL
1174 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
1175 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
1176 * @retval State of bit (1 or 0).
1177 */
LL_EXTI_IsActiveFlag(uint32_t ExtiLine)1178 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag(uint32_t ExtiLine)
1179 {
1180 return ((READ_BIT(SYSCFG->IO_ISCR, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1181 }
1182
1183 /**
1184 * @brief Read ExtLine Combination Flag for Lines in range PA0...PB15
1185 * @rmtoll IO_ISCR LL_EXTI_ReadFlag
1186 * @param ExtiLine This parameter can be a combination of the following values:
1187 * @arg @ref LL_EXTI_LINE_PA0
1188 * @arg @ref LL_EXTI_LINE_PA1
1189 * @arg @ref LL_EXTI_LINE_PA2
1190 * @arg @ref LL_EXTI_LINE_PA3
1191 * @arg @ref LL_EXTI_LINE_PA4
1192 * @arg @ref LL_EXTI_LINE_PA5
1193 * @arg @ref LL_EXTI_LINE_PA6
1194 * @arg @ref LL_EXTI_LINE_PA7
1195 * @arg @ref LL_EXTI_LINE_PA8
1196 * @arg @ref LL_EXTI_LINE_PA9
1197 * @arg @ref LL_EXTI_LINE_PA10
1198 * @arg @ref LL_EXTI_LINE_PA11
1199 * @arg @ref LL_EXTI_LINE_PA12
1200 * @arg @ref LL_EXTI_LINE_PA13
1201 * @arg @ref LL_EXTI_LINE_PA14
1202 * @arg @ref LL_EXTI_LINE_PA15
1203 * @arg @ref LL_EXTI_LINE_PB0
1204 * @arg @ref LL_EXTI_LINE_PB1
1205 * @arg @ref LL_EXTI_LINE_PB2
1206 * @arg @ref LL_EXTI_LINE_PB3
1207 * @arg @ref LL_EXTI_LINE_PB4
1208 * @arg @ref LL_EXTI_LINE_PB5
1209 * @arg @ref LL_EXTI_LINE_PB6
1210 * @arg @ref LL_EXTI_LINE_PB7
1211 * @arg @ref LL_EXTI_LINE_PB8
1212 * @arg @ref LL_EXTI_LINE_PB9
1213 * @arg @ref LL_EXTI_LINE_PB10
1214 * @arg @ref LL_EXTI_LINE_PB11
1215 * @arg @ref LL_EXTI_LINE_PB12
1216 * @arg @ref LL_EXTI_LINE_PB13
1217 * @arg @ref LL_EXTI_LINE_PB14
1218 * @arg @ref LL_EXTI_LINE_PB15
1219 * @arg @ref LL_EXTI_LINE_ALL
1220 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
1221 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
1222 * @retval Flag state
1223 */
LL_EXTI_ReadFlag(uint32_t ExtiLine)1224 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag(uint32_t ExtiLine)
1225 {
1226 return (uint32_t)(READ_BIT(SYSCFG->IO_ISCR, ExtiLine));
1227 }
1228
1229 /**
1230 * @brief Clear ExtLine Flags for Lines in range PA0...PB15
1231 * @rmtoll IO_ISCR LL_EXTI_ClearFlag
1232 * @param ExtiLine This parameter can be a combination of the following values:
1233 * @arg @ref LL_EXTI_LINE_PA0
1234 * @arg @ref LL_EXTI_LINE_PA1
1235 * @arg @ref LL_EXTI_LINE_PA2
1236 * @arg @ref LL_EXTI_LINE_PA3
1237 * @arg @ref LL_EXTI_LINE_PA4
1238 * @arg @ref LL_EXTI_LINE_PA5
1239 * @arg @ref LL_EXTI_LINE_PA6
1240 * @arg @ref LL_EXTI_LINE_PA7
1241 * @arg @ref LL_EXTI_LINE_PA8
1242 * @arg @ref LL_EXTI_LINE_PA9
1243 * @arg @ref LL_EXTI_LINE_PA10
1244 * @arg @ref LL_EXTI_LINE_PA11
1245 * @arg @ref LL_EXTI_LINE_PA12
1246 * @arg @ref LL_EXTI_LINE_PA13
1247 * @arg @ref LL_EXTI_LINE_PA14
1248 * @arg @ref LL_EXTI_LINE_PA15
1249 * @arg @ref LL_EXTI_LINE_PB0
1250 * @arg @ref LL_EXTI_LINE_PB1
1251 * @arg @ref LL_EXTI_LINE_PB2
1252 * @arg @ref LL_EXTI_LINE_PB3
1253 * @arg @ref LL_EXTI_LINE_PB4
1254 * @arg @ref LL_EXTI_LINE_PB5
1255 * @arg @ref LL_EXTI_LINE_PB6
1256 * @arg @ref LL_EXTI_LINE_PB7
1257 * @arg @ref LL_EXTI_LINE_PB8
1258 * @arg @ref LL_EXTI_LINE_PB9
1259 * @arg @ref LL_EXTI_LINE_PB10
1260 * @arg @ref LL_EXTI_LINE_PB11
1261 * @arg @ref LL_EXTI_LINE_PB12
1262 * @arg @ref LL_EXTI_LINE_PB13
1263 * @arg @ref LL_EXTI_LINE_PB14
1264 * @arg @ref LL_EXTI_LINE_PB15
1265 * @arg @ref LL_EXTI_LINE_ALL
1266 * @retval None
1267 * @note PA0-PA15 and PB0-PB15 are valid for STM32WB06 and STM32WB07
1268 * @note PA0-PA3, PA8-PA11, PB0-PB7 and PB12-PB15 are valid for STM32WB05 and STM32WB09
1269 */
LL_EXTI_ClearFlag(uint32_t ExtiLine)1270 __STATIC_INLINE void LL_EXTI_ClearFlag(uint32_t ExtiLine)
1271 {
1272 WRITE_REG(SYSCFG->IO_ISCR, ExtiLine);
1273 }
1274
1275 /**
1276 * @}
1277 */
1278
1279 /**
1280 * @}
1281 */
1282
1283 /** @defgroup FLASH_LL_Exported_Functions FLASH Exported Functions
1284 * @{
1285 */
1286 /** @defgroup SYSTEM_LL_EF_Configuration FLASH Configuration functions
1287 * @{
1288 */
1289 /**
1290 * @brief Enable the FLASH burst write operations.
1291 * @param FLASHx FLASH Instance
1292 * @retval None
1293 */
LL_FLASH_EnableBurstWrite(FLASH_TypeDef * FLASHx)1294 __STATIC_INLINE void LL_FLASH_EnableBurstWrite(FLASH_TypeDef *FLASHx)
1295 {
1296 CLEAR_BIT(FLASHx->CONFIG, FLASH_CONFIG_DIS_GROUP_WRITE);
1297 }
1298
1299 /**
1300 * @brief Disable the FLASH burst write operations.
1301 * @param FLASHx FLASH Instance
1302 * @retval None
1303 */
LL_FLASH_DisableBurstWrite(FLASH_TypeDef * FLASHx)1304 __STATIC_INLINE void LL_FLASH_DisableBurstWrite(FLASH_TypeDef *FLASHx)
1305 {
1306 SET_BIT(FLASHx->CONFIG, FLASH_CONFIG_DIS_GROUP_WRITE);
1307 }
1308
1309 /**
1310 * @brief Set the FLASH Interrupt Vector Table location.
1311 * @param FLASHx FLASH Instance
1312 * @param vect_table Vector Table Configuration
1313 * This parameter can be one of the following values :
1314 * @arg @ref LL_SYSCFG_REMAP_FLASH Vector Table located in FLASH
1315 * @arg @ref LL_SYSCFG_REMAP_SRAM Vector Table located in RAM
1316 * @retval None
1317 */
LL_FLASH_SetVectTable(FLASH_TypeDef * FLASHx,uint32_t vect_table)1318 __STATIC_INLINE void LL_FLASH_SetVectTable(FLASH_TypeDef *FLASHx, uint32_t vect_table)
1319 {
1320 MODIFY_REG(FLASHx->CONFIG, FLASH_CONFIG_REMAP, vect_table);
1321 }
1322
1323 /**
1324 * @brief Get the FLASH Interrupt Vector Table location.
1325 * @param FLASHx FLASH Instance
1326 * @retval Vector Table Configuration
1327 * Returned value can be one of the following values :
1328 * @arg @ref LL_SYSCFG_REMAP_FLASH Vector Table located in FLASH
1329 * @arg @ref LL_SYSCFG_REMAP_SRAM Vector Table located in RAM
1330 */
LL_FLASH_GetVectTable(FLASH_TypeDef * FLASHx)1331 __STATIC_INLINE uint32_t LL_FLASH_GetVectTable(FLASH_TypeDef *FLASHx)
1332 {
1333 return (uint32_t)(READ_BIT(FLASHx->CONFIG, FLASH_CONFIG_REMAP));
1334 }
1335 /**
1336 * @}
1337 */
1338
1339 /** @defgroup SYSTEM_LL_EF_FLASH_Interrupt FLASH Interrupts Functions
1340 * @brief Functions to handle FLASH interrupts
1341 * @{
1342 */
1343
1344 /**
1345 * @brief Enable the specified FLASH interrupt.
1346 * @param FLASHx FLASH Instance
1347 * @param interrupt FLASH interrupt
1348 * This parameter can be any combination of the following values:
1349 * @arg @ref LL_FLASH_IT_CMDDONE Command Done Interrupt
1350 * @arg @ref LL_FLASH_IT_CMDSTART Command Started Interrupt
1351 * @arg @ref LL_FLASH_IT_CMDERR Command Error Interrupt
1352 * @arg @ref LL_FLASH_IT_ILLCMD Illegal Command Interrupt
1353 * @retval none
1354 */
LL_FLASH_EnableIT(FLASH_TypeDef * FLASHx,uint32_t interrupt)1355 __STATIC_INLINE void LL_FLASH_EnableIT(FLASH_TypeDef *FLASHx, uint32_t interrupt)
1356 {
1357 CLEAR_BIT(FLASHx->IRQMASK, interrupt);
1358 }
1359
1360 /**
1361 * @brief Disable the specified FLASH interrupt.
1362 * @param FLASHx FLASH Instance
1363 * @param interrupt FLASH interrupt
1364 * This parameter can be any combination of the following values:
1365 * @arg @ref LL_FLASH_IT_CMDDONE Command Done Interrupt
1366 * @arg @ref LL_FLASH_IT_CMDSTART Command Started Interrupt
1367 * @arg @ref LL_FLASH_IT_CMDERR Command Error Interrupt
1368 * @arg @ref LL-FLASH_IT_ILLCMD Illegal Command Interrupt
1369 * @retval none
1370 */
LL_FLASH_DisableIT(FLASH_TypeDef * FLASHx,uint32_t interrupt)1371 __STATIC_INLINE void LL_FLASH_DisableIT(FLASH_TypeDef *FLASHx, uint32_t interrupt)
1372 {
1373 SET_BIT(FLASHx->IRQMASK, interrupt);
1374 }
1375
1376 /**
1377 * @brief Check whether the specified FLASH interrupt has occurred or not.
1378 * @param FLASHx FLASH Instance
1379 * @param interrupt FLASH interrupt
1380 * This parameter can be any combination of the following values:
1381 * @arg @ref FLASH_IT_CMDDONE Command Done Interrupt
1382 * @arg @ref FLASH_IT_CMDSTART Command Started Interrupt
1383 * @arg @ref FLASH_IT_CMDERR Command Error Interrupt
1384 * @arg @ref FLASH_IT_ILLCMD Illegal Command Interrupt
1385 * @retval The new state of interrupt flag (SET or RESET).
1386 */
LL_FLASH_GetIT(FLASH_TypeDef * FLASHx,uint32_t interrupt)1387 __STATIC_INLINE uint32_t LL_FLASH_GetIT(FLASH_TypeDef *FLASHx, uint32_t interrupt)
1388 {
1389 return (uint32_t)((READ_BIT(FLASHx->IRQSTAT, interrupt) != RESET) ? SET : RESET);
1390 }
1391
1392 /**
1393 * @brief Clear the specified FLASH interrupt flag.
1394 * @param FLASHx FLASH Instance
1395 * @param interrupt FLASH interrupt
1396 * This parameter can be any combination of the following values:
1397 * @arg @ref FLASH_IT_CMDDONE Command Done Interrupt
1398 * @arg @ref FLASH_IT_CMDSTART Command Started Interrupt
1399 * @arg @ref FLASH_IT_CMDERR Command Error Interrupt
1400 * @arg @ref FLASH_IT_ILLCMD Illegal Command Interrupt
1401 * @retval None
1402 */
LL_FLASH_ClearIT(FLASH_TypeDef * FLASHx,uint32_t interrupt)1403 __STATIC_INLINE void LL_FLASH_ClearIT(FLASH_TypeDef *FLASHx, uint32_t interrupt)
1404 {
1405 WRITE_REG(FLASHx->IRQSTAT, interrupt);
1406 }
1407
1408 /**
1409 * @brief Check whether the specified FLASH flag is set or not.
1410 * @param FLASHx FLASH Instance
1411 * @param flag specifies the FLASH flag to check.
1412 * This parameter can be one of the following values:
1413 * @arg @ref LL_FLASH_FLAG_CMDDONE FLASH command done flag
1414 * @arg @ref LL_FLASH_FLAG_CMDSTART FLASH command started flag
1415 * @arg @ref LL_FLASH_FLAG_CMDERR FLASH command error flag
1416 * @arg @ref LL_FLASH_FLAG_ILLCMD FLASH illegal command flag
1417 * @retval The new state of FLASH flag (SET or RESET).
1418 */
LL_FLASH_GetFlag(FLASH_TypeDef * FLASHx,uint32_t flag)1419 __STATIC_INLINE uint32_t LL_FLASH_GetFlag(FLASH_TypeDef *FLASHx, uint32_t flag)
1420 {
1421 return (uint32_t)((READ_BIT(FLASHx->IRQRAW, flag) == flag) ? 1UL : 0UL);
1422 }
1423
1424 /**
1425 * @brief Clear the FLASH's pending flags.
1426 * @param FLASHx FLASH Instance
1427 * @param flag specifies the FLASH flags to clear.
1428 * This parameter can be any combination of the following values:
1429 * @arg @ref LL_FLASH_FLAG_CMDDONE FLASH command done flag
1430 * @arg @ref LL_FLASH_FLAG_CMDSTART FLASH command started flag
1431 * @arg @ref LL_FLASH_FLAG_CMDERR FLASH command error flag
1432 * @arg @ref LL_FLASH_FLAG_ILLCMD FLASH illegal command flag
1433 * @retval None
1434 */
LL_FLASH_ClearFlag(FLASH_TypeDef * FLASHx,uint32_t flag)1435 __STATIC_INLINE void LL_FLASH_ClearFlag(FLASH_TypeDef *FLASHx, uint32_t flag)
1436 {
1437 WRITE_REG(FLASHx->IRQRAW, flag);
1438 }
1439
1440 /**
1441 * @}
1442 */
1443
1444 /** @defgroup FLASH_Security FLASH Security Functions
1445 * @brief Functions to read FLASH security applied
1446 * @{
1447 */
1448
1449 /**
1450 * @brief Check if FLASH & RAM SWD access is disabled
1451 * @rmtoll SIZE SWD_DISABLE LL_FLASH_SWD_Access_IsDisabled
1452 * @retval State of bit (1 or 0).
1453 */
LL_FLASH_SWD_Access_IsDisabled(void)1454 __STATIC_INLINE uint32_t LL_FLASH_SWD_Access_IsDisabled(void)
1455 {
1456 return ((READ_BIT(FLASH->SIZE, FLASH_FLASH_SIZE_SWD_DISABLE) == (FLASH_FLASH_SIZE_SWD_DISABLE)) ? 1UL : 0UL);
1457 }
1458
1459 /**
1460 * @brief Check if FLASH Readout Protection is enabled
1461 * @rmtoll SIZE FLASH_SECURE LL_FLASH_ReadoutProtection_IsEnabled
1462 * @retval State of bit (1 or 0).
1463 */
LL_FLASH_ReadoutProtection_IsEnabled(void)1464 __STATIC_INLINE uint32_t LL_FLASH_ReadoutProtection_IsEnabled(void)
1465 {
1466 return ((READ_BIT(FLASH->SIZE, FLASH_FLASH_SIZE_FLASH_SECURE) == (FLASH_FLASH_SIZE_FLASH_SECURE)) ? 1UL : 0UL);
1467 }
1468
1469 /**
1470 * @}
1471 */
1472
1473
1474 /** @defgroup SYSTEM_LL_EF_FLASH FLASH
1475 * @{
1476 */
1477
1478 /**
1479 * @brief Set FLASH Latency
1480 * @rmtoll FLASH_CONFIG WAIT_STATE LL_FLASH_SetLatency
1481 * @param Latency This parameter can be one of the following values:
1482 * @arg LL_FLASH_LATENCY_0
1483 * @arg LL_FLASH_LATENCY_1
1484 * @retval None
1485 */
LL_FLASH_SetLatency(uint32_t Latency)1486 __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
1487 {
1488 MODIFY_REG(FLASH->CONFIG, FLASH_CONFIG_WAIT_STATES, Latency);
1489 }
1490
1491 /**
1492 * @brief Get FLASH Latency
1493 * @rmtoll FLASH_CONFIG WAIT_STATE LL_FLASH_GetLatency
1494 * @retval Returned value can be one of the following values:
1495 * @arg LL_FLASH_LATENCY_0
1496 * @arg LL_FLASH_LATENCY_1
1497 */
LL_FLASH_GetLatency(void)1498 __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
1499 {
1500 return (uint32_t)(READ_BIT(FLASH->CONFIG, FLASH_CONFIG_WAIT_STATES));
1501 }
1502
1503 /**
1504 * @}
1505 */
1506 /**
1507 * @}
1508 */
1509
1510 /** @defgroup SYSCFG_BLE_LL_Exported_Functions SYSCFG BLE Exported Functions
1511 * @{
1512 */
1513 /** @defgroup SYSCFG_LL_RADIO_RXTX_IT_Management RX TX IT_Management
1514 * @{
1515 */
1516 /**
1517 * @brief Enable Tx Rx Interrupt
1518 * @rmtoll BLERXTX_IER LL_SYSCFG_BLERXTX_EnableIT
1519 * @param Signal This parameter can be a combination of the following values:
1520 * @arg LL_SYSCFG_BLE_TX_EVENT
1521 * @arg LL_SYSCFG_BLE_RX_EVENT
1522 * @retval None
1523 */
LL_SYSCFG_BLERXTX_EnableIT(uint32_t Signal)1524 __STATIC_INLINE void LL_SYSCFG_BLERXTX_EnableIT(uint32_t Signal)
1525 {
1526 SET_BIT(SYSCFG->BLERXTX_IER, Signal);
1527 }
1528
1529 /**
1530 * @brief Disable Tx Rx Interrupt
1531 * @rmtoll BLERXTX_IER LL_SYSCFG_BLERXTX_DisableIT
1532 * @param Signal This parameter can be a combination of the following values:
1533 * @arg LL_SYSCFG_BLE_TX_EVENT
1534 * @arg LL_SYSCFG_BLE_RX_EVENT
1535 * @retval None
1536 */
LL_SYSCFG_BLERXTX_DisableIT(uint32_t Signal)1537 __STATIC_INLINE void LL_SYSCFG_BLERXTX_DisableIT(uint32_t Signal)
1538 {
1539 CLEAR_BIT(SYSCFG->BLERXTX_IER, Signal);
1540 }
1541
1542 /**
1543 * @brief Indicate if Tx Rx Interrupt is enabled
1544 * @rmtoll BLERXTX_IER LL_SYSCFG_BLERXTX_IsEnabledIT
1545 * @param Signal This parameter can be a combination of the following values:
1546 * @arg LL_SYSCFG_BLE_TX_EVENT
1547 * @arg LL_SYSCFG_BLE_RX_EVENT
1548 * @retval State of bit (1 or 0).
1549 */
LL_SYSCFG_BLERXTX_IsEnabledIT(uint32_t Signal)1550 __STATIC_INLINE uint32_t LL_SYSCFG_BLERXTX_IsEnabledIT(uint32_t Signal)
1551 {
1552 return ((READ_BIT(SYSCFG->BLERXTX_IER, Signal) == (Signal)) ? 1UL : 0UL);
1553 }
1554
1555 /**
1556 * @}
1557 */
1558
1559 /** @defgroup SYSCFG_LL_RADIO_EVENT_TYPE_Management Level-Edge Management
1560 * @{
1561 */
1562 /**
1563 * @brief Set Tx-Rx Interrupt Detection Type
1564 * @rmtoll BLERXTX_DTR LL_SYSCFG_BLERXTX_SetType
1565 * @param Type This parameter can be one of the following values:
1566 * @arg LL_SYSCFG_BLERXTX_DET_TYPE_EDGE
1567 * @arg LL_SYSCFG_BLERXTX_DET_TYPE_LEVEL
1568 * @param Signal This parameter can be a combination of the following values:
1569 * @arg LL_SYSCFG_BLE_TX_EVENT
1570 * @arg LL_SYSCFG_BLE_RX_EVENT
1571 * @retval None
1572 */
LL_SYSCFG_BLERXTX_SetType(uint8_t Type,uint32_t Signal)1573 __STATIC_INLINE void LL_SYSCFG_BLERXTX_SetType(uint8_t Type, uint32_t Signal)
1574 {
1575 if (Type == LL_SYSCFG_BLERXTX_DET_TYPE_EDGE)
1576 {
1577 CLEAR_BIT(SYSCFG->BLERXTX_DTR, Signal);
1578 }
1579 else
1580 {
1581 SET_BIT(SYSCFG->BLERXTX_DTR, Signal);
1582 }
1583 }
1584
1585 /**
1586 * @brief Get Tx-Rx Interrupt Detection Type
1587 * @rmtoll BLERXTX_DTR LL_SYSCFG_BLERXTX_GetType
1588 * @param Signal This parameter one of the following values:
1589 * @arg LL_SYSCFG_BLE_TX_EVENT
1590 * @arg LL_SYSCFG_BLE_RX_EVENT
1591 * @retval One of the following values:
1592 * @arg LL_SYSCFG_BLERXTX_DET_TYPE_EDGE
1593 * @arg LL_SYSCFG_BLERXTX_DET_TYPE_LEVEL
1594 */
LL_SYSCFG_BLERXTX_GetType(uint32_t Signal)1595 __STATIC_INLINE uint32_t LL_SYSCFG_BLERXTX_GetType(uint32_t Signal)
1596 {
1597 if (READ_BIT(SYSCFG->BLERXTX_DTR, Signal))
1598 {
1599 return LL_SYSCFG_BLERXTX_DET_TYPE_LEVEL;
1600 }
1601
1602 return LL_SYSCFG_BLERXTX_DET_TYPE_EDGE;
1603 }
1604
1605 /**
1606 * @}
1607 */
1608
1609 /** @defgroup LL_SYSCFG_BLERXTX_Trigger Trigger Management
1610 * @{
1611 */
1612 /**
1613 * @brief Set Tx Rx Interrupt Trigger
1614 * @rmtoll BLERXTX_IBER/BLERXTX__IEVR/BLERXTX__DTR LL_SYSCFG_BLERXTX_SetTrigger
1615 * @param Trigger This parameter can be one of the following values:
1616 * @arg LL_SYSCFG_BLERXTX_TRIGGER_RISING_EDGE
1617 * @arg LL_SYSCFG_BLERXTX_TRIGGER_FALLING_EDGE
1618 * @arg LL_SYSCFG_BLERXTX_TRIGGER_BOTH_EDGE
1619 * @arg LL_SYSCFG_BLERXTX_TRIGGER_LOW_LEVEL
1620 * @arg LL_SYSCFG_BLERXTX_TRIGGER_HIGH_LEVEL
1621 * @param Signal This parameter can be a combination of the following values:
1622 * @arg LL_SYSCFG_BLE_TX_EVENT
1623 * @arg LL_SYSCFG_BLE_RX_EVENT
1624 * @retval None
1625 */
LL_SYSCFG_BLERXTX_SetTrigger(uint8_t Trigger,uint32_t Signal)1626 __STATIC_INLINE void LL_SYSCFG_BLERXTX_SetTrigger(uint8_t Trigger, uint32_t Signal)
1627 {
1628 switch (Trigger)
1629 {
1630 case LL_SYSCFG_BLERXTX_TRIGGER_BOTH_EDGE:
1631 {
1632 SET_BIT(SYSCFG->BLERXTX_IBER, Signal);
1633 CLEAR_BIT(SYSCFG->BLERXTX_IEVR, Signal);
1634 break;
1635 }
1636 case LL_SYSCFG_BLERXTX_TRIGGER_RISING_EDGE:
1637 {
1638 CLEAR_BIT(SYSCFG->BLERXTX_IBER, Signal);
1639 SET_BIT(SYSCFG->BLERXTX_IEVR, Signal);
1640 break;
1641 }
1642 case LL_SYSCFG_BLERXTX_TRIGGER_FALLING_EDGE:
1643 {
1644 CLEAR_BIT(SYSCFG->BLERXTX_IBER, Signal);
1645 CLEAR_BIT(SYSCFG->BLERXTX_IEVR, Signal);
1646 break;
1647 }
1648 case LL_SYSCFG_BLERXTX_TRIGGER_LOW_LEVEL:
1649 {
1650 CLEAR_BIT(SYSCFG->BLERXTX_IBER, Signal);
1651 CLEAR_BIT(SYSCFG->BLERXTX_IEVR, Signal);
1652 break;
1653 }
1654 case LL_SYSCFG_BLERXTX_TRIGGER_HIGH_LEVEL:
1655 {
1656 CLEAR_BIT(SYSCFG->BLERXTX_IBER, Signal);
1657 SET_BIT(SYSCFG->BLERXTX_IEVR, Signal);
1658 }
1659 }
1660 }
1661
1662 /**
1663 * @brief Get Tx Rx Interrupt Trigger
1664 * @rmtoll BLERXTX_IBER/BLERXTX_IEVR/BLERXTX_DTR LL_SYSCFG_BLERXTX_GetTrigger
1665 * @param Signal This parameter can be one of the following values:
1666 * @arg LL_SYSCFG_BLE_TX_EVENT
1667 * @arg LL_SYSCFG_BLE_RX_EVENT
1668 * @retval The return value can be one of the following values:
1669 * @arg LL_SYSCFG_BLERXTX_TRIGGER_RISING_EDGE
1670 * @arg LL_SYSCFG_BLERXTX_TRIGGER_FALLING_EDGE
1671 * @arg LL_SYSCFG_BLERXTX_TRIGGER_BOTH_EDGE
1672 * @arg LL_SYSCFG_BLERXTX_TRIGGER_LOW_LEVEL
1673 * @arg LL_SYSCFG_BLERXTX_TRIGGER_HIGH_LEVEL
1674 */
LL_SYSCFG_BLERXTX_GetTrigger(uint32_t Signal)1675 __STATIC_INLINE uint8_t LL_SYSCFG_BLERXTX_GetTrigger(uint32_t Signal)
1676 {
1677 uint32_t level_setup, level_edge, both_edge;
1678
1679 level_setup = READ_BIT(SYSCFG->BLERXTX_DTR, Signal);
1680 level_edge = READ_BIT(SYSCFG->BLERXTX_IEVR, Signal);
1681 both_edge = READ_BIT(SYSCFG->BLERXTX_IBER, Signal);
1682
1683 if (level_setup)
1684 {
1685 if (level_edge)
1686 {
1687 return LL_SYSCFG_BLERXTX_TRIGGER_HIGH_LEVEL;
1688 }
1689 else
1690 {
1691 return LL_SYSCFG_BLERXTX_TRIGGER_LOW_LEVEL;
1692 }
1693 }
1694 else
1695 {
1696 if (both_edge)
1697 {
1698 return LL_SYSCFG_BLERXTX_TRIGGER_BOTH_EDGE;
1699 }
1700 if (level_edge)
1701 {
1702 return LL_SYSCFG_BLERXTX_TRIGGER_RISING_EDGE;
1703 }
1704 }
1705 return LL_SYSCFG_BLERXTX_TRIGGER_FALLING_EDGE;
1706 }
1707
1708 /**
1709 * @}
1710 */
1711
1712 /** @defgroup SYSCFG_LL_EVENT_Flag_Management Flag Management
1713 * @{
1714 */
1715 /**
1716 * @brief Check if the Tx Rx Interrupt is set or not
1717 * @note This bit is cleared by writing a 1 to the bit.
1718 * @rmtoll BLERXTX_ISCR LL_SYSCFG_BLERXTX_IsInterruptPending
1719 * @param Signal This parameter can be a combination of the following values:
1720 * @arg LL_SYSCFG_BLE_TX_EVENT
1721 * @arg LL_SYSCFG_BLE_RX_EVENT
1722 * @retval State of bit (1 or 0).
1723 */
LL_SYSCFG_BLERXTX_IsInterruptPending(uint32_t Signal)1724 __STATIC_INLINE uint32_t LL_SYSCFG_BLERXTX_IsInterruptPending(uint32_t Signal)
1725 {
1726 return ((READ_BIT(SYSCFG->BLERXTX_ISCR, Signal) == (Signal)) ? 1UL : 0UL);
1727 }
1728
1729
1730 /**
1731 * @brief Clear the Tx Rx Interrupt
1732 * @rmtoll BLERXTX_ISCR LL_SYSCFG_BLERXTX_ClearInterrupt
1733 * @param Signal This parameter can be a combination of the following values:
1734 * @arg LL_SYSCFG_BLE_TX_EVENT
1735 * @arg LL_SYSCFG_BLE_RX_EVENT
1736 * @retval None
1737 */
LL_SYSCFG_BLERXTX_ClearInterrupt(uint32_t Signal)1738 __STATIC_INLINE void LL_SYSCFG_BLERXTX_ClearInterrupt(uint32_t Signal)
1739 {
1740 WRITE_REG(SYSCFG->BLERXTX_ISCR, Signal);
1741 }
1742
1743
1744 #if defined(SYSCFG_BLERXTX_ISCR_TX_ISEDGE)
1745 /**
1746 * @brief Returns the TX interrupt edge status on a TX sequence event
1747 * @rmtoll BLERXTX_ISCR LL_SYSCFG_BLETX_EdgeSequence
1748 * @retval The return value can be one of the following values:
1749 * @arg LL_SYSCFG_BLE_TX_FALLING_EDGE_EVENT
1750 * @arg LL_SYSCFG_BLE_TX_RISING_EDGE_EVENT
1751 */
LL_SYSCFG_BLETX_EdgeSequence(void)1752 __STATIC_INLINE uint32_t LL_SYSCFG_BLETX_EdgeSequence(void)
1753 {
1754 return READ_BIT(SYSCFG->BLERXTX_ISCR, SYSCFG_BLERXTX_ISCR_TX_ISEDGE);
1755 }
1756 #endif
1757
1758
1759 #if defined(SYSCFG_BLERXTX_ISCR_RX_ISEDGE)
1760 /**
1761 * @brief Returns the RX interrupt edge status on a RX sequence event
1762 * @rmtoll BLERXTX_ISCR LL_SYSCFG_BLERX_EdgeSequence
1763 * @retval The return value can be one of the following values:
1764 * @arg LL_SYSCFG_BLE_RX_FALLING_EDGE_EVENT
1765 * @arg LL_SYSCFG_BLE_RX_RISING_EDGE_EVENT
1766 */
LL_SYSCFG_BLERX_EdgeSequence(void)1767 __STATIC_INLINE uint32_t LL_SYSCFG_BLERX_EdgeSequence(void)
1768 {
1769 return READ_BIT(SYSCFG->BLERXTX_ISCR, SYSCFG_BLERXTX_ISCR_RX_ISEDGE);
1770 }
1771 #endif
1772
1773
1774 /**
1775 * @}
1776 */
1777 /**
1778 * @}
1779 */
1780
1781 #if defined(USE_FULL_LL_DRIVER)
1782 /** @defgroup SYSCFG_IO_LL_EF_Init Initialization and de-initialization functions
1783 * @{
1784 */
1785
1786 ErrorStatus LL_SYSCFG_IO_Init(LL_SYSCFG_IO_InitTypeDef *SYSCFG_IO_InitStruct);
1787 ErrorStatus LL_SYSCFG_IO_DeInit(void);
1788 void LL_SYSCFG_IO_StructInit(LL_SYSCFG_IO_InitTypeDef *SYSCFG_IO_InitStruct);
1789
1790 /**
1791 * @}
1792 */
1793 #endif /* USE_FULL_LL_DRIVER */
1794
1795
1796 /**
1797 * @}
1798 */
1799
1800 /**
1801 * @}
1802 */
1803
1804 #endif /* defined (FLASH) || defined (SYSCFG) */
1805
1806 /**
1807 * @}
1808 */
1809
1810 #ifdef __cplusplus
1811 }
1812 #endif
1813
1814 #endif /* STM32WB0x_LL_SYSTEM_H */
1815
