Searched refs:LL_APB1_GRP2_PERIPH_MDIOS (Results 1 – 4 of 4) sorted by relevance
1129 #define __HAL_RCC_MDIOS_CLK_ENABLE() LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_MDIOS)1130 #define __HAL_RCC_MDIOS_CLK_DISABLE() LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_MDIOS)1616 #define __HAL_RCC_MDIOS_IS_CLK_ENABLED() LL_APB1_GRP2_IsEnabledClock(LL_APB1_GRP2_PERIPH_MDIOS)2075 #define __HAL_RCC_MDIOS_FORCE_RESET() LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_MDIOS)2076 #define __HAL_RCC_MDIOS_RELEASE_RESET() LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_MDIOS)2635 …ine __HAL_RCC_MDIOS_CLK_SLEEP_ENABLE() LL_APB1_GRP2_EnableClockLowPower(LL_APB1_GRP2_PERIPH_MDIOS)2636 …ne __HAL_RCC_MDIOS_CLK_SLEEP_DISABLE() LL_APB1_GRP2_DisableClockLowPower(LL_APB1_GRP2_PERIPH_MDIOS)3103 …AL_RCC_MDIOS_IS_CLK_SLEEP_ENABLED() LL_APB1_GRP2_IsEnabledClockLowPower(LL_APB1_GRP2_PERIPH_MDIOS)
292 #define LL_APB1_GRP2_PERIPH_MDIOS RCC_APB1ENR2_MDIOSEN macro294 #define LL_APB1_GRP2_PERIPH_ALL (LL_APB1_GRP2_PERIPH_FDCAN | LL_APB1_GRP2_PERIPH_MDIOS |…
195 #define LL_APB1_GRP2_PERIPH_MDIOS RCC_APB1ENR2_MDIOSEN macro
303 #define LL_APB1_GRP2_PERIPH_MDIOS RCC_APB1HENR_MDIOSEN macro
