Searched refs:LL_AHB5_GRP1_PERIPH_NPU (Results 1 – 2 of 2) sorted by relevance
1072 #define __HAL_RCC_NPU_CLK_ENABLE() LL_AHB5_GRP1_EnableClock(LL_AHB5_GRP1_PERIPH_NPU)1073 #define __HAL_RCC_NPU_CLK_DISABLE() LL_AHB5_GRP1_DisableClock(LL_AHB5_GRP1_PERIPH_NPU)1574 #define __HAL_RCC_NPU_IS_CLK_ENABLED() LL_AHB5_GRP1_IsEnabledClock(LL_AHB5_GRP1_PERIPH_NPU)2006 #define __HAL_RCC_NPU_FORCE_RESET() LL_AHB5_GRP1_ForceReset(LL_AHB5_GRP1_PERIPH_NPU);2007 #define __HAL_RCC_NPU_RELEASE_RESET() LL_AHB5_GRP1_ReleaseReset(LL_AHB5_GRP1_PERIPH_NPU);2578 …fine __HAL_RCC_NPU_CLK_SLEEP_ENABLE() LL_AHB5_GRP1_EnableClockLowPower(LL_AHB5_GRP1_PERIPH_NPU)2579 …ine __HAL_RCC_NPU_CLK_SLEEP_DISABLE() LL_AHB5_GRP1_DisableClockLowPower(LL_AHB5_GRP1_PERIPH_NPU)3061 …HAL_RCC_NPU_IS_CLK_SLEEP_ENABLED() LL_AHB5_GRP1_IsEnabledClockLowPower(LL_AHB5_GRP1_PERIPH_NPU)
212 #define LL_AHB5_GRP1_PERIPH_NPU RCC_AHB5ENR_NPUEN macro231 … LL_AHB5_GRP1_PERIPH_CACHEAXI | LL_AHB5_GRP1_PERIPH_NPU | \
