Searched refs:LL_AHB2_GRP1_PERIPH_GPIOH (Results 1 – 16 of 16) sorted by relevance
826 …ine __HAL_RCC_GPIOH_CLK_ENABLE() LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH)831 …ne __HAL_RCC_GPIOH_CLK_DISABLE() LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOH)1054 … __HAL_RCC_GPIOH_IS_CLK_ENABLED() LL_AHB2_GRP1_IsEnabledClock(LL_AHB2_GRP1_PERIPH_GPIOH)1200 …fine __HAL_RCC_GPIOH_FORCE_RESET() LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH)1206 …ne __HAL_RCC_GPIOH_RELEASE_RESET() LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH)1390 …_HAL_RCC_GPIOH_CLK_SLEEP_ENABLE() LL_AHB2_GRP1_EnableClockSleep(LL_AHB2_GRP1_PERIPH_GPIOH)1395 …HAL_RCC_GPIOH_CLK_SLEEP_DISABLE() LL_AHB2_GRP1_DisableClockSleep(LL_AHB2_GRP1_PERIPH_GPIOH)1621 …L_RCC_GPIOH_IS_CLK_SLEEP_ENABLED() LL_AHB2_GRP1_IsEnabledClockSleep(LL_AHB2_GRP1_PERIPH_GPIOH)
90 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR_GPIOHEN macro
915 #define __HAL_RCC_GPIOH_CLK_ENABLE() LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH)929 #define __HAL_RCC_GPIOH_CLK_DISABLE() LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOH)1118 …efine __HAL_RCC_GPIOH_IS_CLK_ENABLED() LL_AHB2_GRP1_IsEnabledClock(LL_AHB2_GRP1_PERIPH_GPIOH)1133 …ne __HAL_RCC_GPIOH_IS_CLK_DISABLED() !(LL_AHB2_GRP1_IsEnabledClock(LL_AHB2_GRP1_PERIPH_GPIOH))1768 #define __HAL_RCC_GPIOH_FORCE_RESET() LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH)1784 #define __HAL_RCC_GPIOH_RELEASE_RESET() LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH)2014 …ine __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE() LL_AHB2_GRP1_EnableClockSleep(LL_AHB2_GRP1_PERIPH_GPIOH)2029 …ne __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE() LL_AHB2_GRP1_DisableClockSleep(LL_AHB2_GRP1_PERIPH_GPIOH)
102 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR_GPIOHEN macro
132 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()133 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()
129 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()130 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()
148 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()149 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()
157 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()158 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()
158 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()159 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()
162 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()163 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOH); in LL_GPIO_DeInit()
95 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR_GPIOHEN macro
111 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR_GPIOHEN macro
93 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR_GPIOHEN macro
153 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR_GPIOHEN macro
118 #define LL_AHB2_GRP1_PERIPH_GPIOH RCC_AHB2ENR1_GPIOHEN macro