1 /**
2 ******************************************************************************
3 * @file stm32wb0x_ll_adc.h
4 * @author GPM Application Team
5 * @brief Header file of ADC LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2024 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WB0x_LL_ADC_H
21 #define STM32WB0x_LL_ADC_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif /* __cpluplus */
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wb0x.h"
29
30 /** @addtogroup STM32WB0x_LL_Driver
31 * @{
32 */
33
34 #if defined (ADC1)
35
36 /** @defgroup ADC_LL ADC
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44 /** @defgroup ADC_LL_Private_Constants ADC Private Constants
45 * @{
46 */
47
48 /* Internal mask for ADC sequencer: */
49 /* To select into literal LL_ADC_RANK_x the relevant bits for: */
50 /* - sequencer register offset */
51 /* - sequencer rank bits position into the selected register */
52
53 /* Internal register offset for ADC sequencer configuration */
54 /* (offset placed into a spare area of literal definition) */
55 #define ADC_SEQ_1_REGOFFSET (0x00000000UL)
56 #define ADC_SEQ_2_REGOFFSET (0x00000100UL)
57
58 #define ADC_SEQ_X_REGOFFSET_MASK (ADC_SEQ_1_REGOFFSET | ADC_SEQ_2_REGOFFSET)
59 #define ADC_SEQ_X_REGOFFSET_POS (8UL) /* Position of bits ADC_SEQ_x_REGOFFSET in ADC_REG_SEQ_X_REGOFFSET_MASK*/
60 #define ADC_RANK_ID_SEQ_X_MASK (0xFFUL)
61
62 /* Definition of ADC sequencer bits information to be inserted */
63 /* into ADC sequencer ranks literals definition. */
64 #define ADC_RANK_1_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ0_Pos)
65 #define ADC_RANK_2_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ1_Pos)
66 #define ADC_RANK_3_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ2_Pos)
67 #define ADC_RANK_4_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ3_Pos)
68 #define ADC_RANK_5_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ4_Pos)
69 #define ADC_RANK_6_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ5_Pos)
70 #define ADC_RANK_7_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ6_Pos)
71 #define ADC_RANK_8_SEQ_X_BITOFFSET_POS (ADC_SEQ_1_SEQ7_Pos)
72 #define ADC_RANK_9_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ8_Pos)
73 #define ADC_RANK_10_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ9_Pos)
74 #define ADC_RANK_11_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ10_Pos)
75 #define ADC_RANK_12_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ11_Pos)
76 #define ADC_RANK_13_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ12_Pos)
77 #define ADC_RANK_14_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ13_Pos)
78 #define ADC_RANK_15_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ14_Pos)
79 #define ADC_RANK_16_SEQ_X_BITOFFSET_POS (ADC_SEQ_2_SEQ15_Pos)
80
81 static const uint8_t ADC_CHANNEL_SWITCH_POS_LUT[12] =
82 {
83 (uint8_t)(ADC_SWITCH_SE_VIN_0_Pos), /*!< ADC_SWITCH_SE_VIN_0 Channel ADC_INM0 */
84 (uint8_t)(ADC_SWITCH_SE_VIN_1_Pos), /*!< ADC_SWITCH_SE_VIN_1 Channel ADC_INM1 */
85 (uint8_t)(ADC_SWITCH_SE_VIN_2_Pos), /*!< ADC_SWITCH_SE_VIN_2 Channel ADC_INM2 */
86 (uint8_t)(ADC_SWITCH_SE_VIN_3_Pos), /*!< ADC_SWITCH_SE_VIN_3 Channel ADC_INM3 */
87 (uint8_t)(ADC_SWITCH_SE_VIN_4_Pos), /*!< ADC_SWITCH_SE_VIN_4 Channel ADC_INP1 */
88 (uint8_t)(ADC_SWITCH_SE_VIN_5_Pos), /*!< ADC_SWITCH_SE_VIN_5 Channel ADC_INP2 */
89 (uint8_t)(ADC_SWITCH_SE_VIN_6_Pos), /*!< ADC_SWITCH_SE_VIN_6 Channel ADC_INP3 */
90 (uint8_t)(ADC_SWITCH_SE_VIN_7_Pos), /*!< ADC_SWITCH_SE_VIN_7 Channel ADC_INP4 */
91 (uint8_t)(ADC_SWITCH_SE_VIN_0_Pos), /*!< ADC_SWITCH_SE_VIN_0 Channel ADC_INP1 - ADC_INM1 */
92 (uint8_t)(ADC_SWITCH_SE_VIN_1_Pos), /*!< ADC_SWITCH_SE_VIN_1 Channel ADC_INP2 - ADC_INM2 */
93 (uint8_t)(ADC_SWITCH_SE_VIN_2_Pos), /*!< ADC_SWITCH_SE_VIN_2 Channel ADC_INP3 - ADC_INM3 */
94 (uint8_t)(ADC_SWITCH_SE_VIN_3_Pos), /*!< ADC_SWITCH_SE_VIN_3 Channel ADC_INP4 - ADC_INM4 */
95 };
96
97 #if defined(STM32WB09) || defined(STM32WB05)
98 #define TEMPSENSOR_TCK_ADDR ((uint32_t*) (0x10001E5CUL)) /* Internal temperature sensor, address of
99 parameter TCK: TCK is the chuck temperature in 0.1DegC (e.g. 30DegC = 300)*/
100 #else
101 #define TEMPSENSOR_C85_ADDR ((uint32_t*) (0x10001E68UL)) /* Internal temperature sensor, address of
102 parameter C85: On this STM32 series, temperature sensor ADC raw data
103 acquired at temperature 85 DegC. */
104 #define TEMPSENSOR_C85_TEMP (85UL) /* Internal temperature sensor, temperature
105 at which temperature sensor has been calibrated in production for data
106 into TEMPSENSOR_C85_ADDR (tolerance: +-5 DegC) (unit: DegC). */
107 #endif /* defined(STM32WB09) || defined(STM32WB05) */
108 #define TEMPSENSOR_C30_ADDR ((uint32_t*) (0x10001E60UL)) /* Internal temperature sensor, address of
109 parameter C30: On this STM32 series, temperature sensor ADC raw data
110 acquired at temperature 30 DegC. */
111
112 #define TEMPSENSOR_C30_TEMP (30UL) /* Internal temperature sensor, temperature
113 at which temperature sensor has been calibrated in production for data
114 into TEMPSENSOR_C30_ADDR (tolerance: +-5 DegC) (unit: DegC). */
115
116 /** @defgroup ADC_LL_CALIB_ADDRESS ADC calibration points location
117 * @brief Defines the memory address of the calibration points.
118 * @{
119 */
120 #define ADC_LAYOUT_ID (0x10001EFCUL)
121 #define ADC_CALIB_ADDRESS_VINPX_3V6 (0x10001E20UL)
122 #define ADC_CALIB_ADDRESS_VINMX_3V6 (0x10001E1CUL)
123 #define ADC_CALIB_ADDRESS_VINDIFF_3V6 (0x10001E18UL)
124 #define ADC_CALIB_ADDRESS_VINPX_2V4 (0x10001E14UL)
125 #define ADC_CALIB_ADDRESS_VINMX_2V4 (0x10001E10UL)
126 #define ADC_CALIB_ADDRESS_VINDIFF_2V4 (0x10001E0CUL)
127 #define ADC_CALIB_ADDRESS_VINPX_1V2 (0x10001E08UL)
128 #define ADC_CALIB_ADDRESS_VINMX_1V2 (0x10001E04UL)
129 #define ADC_CALIB_ADDRESS_VINDIFF_1V2 (0x10001E00UL)
130
131 /**
132 * @}
133 */
134
135 /* Uncomment this symbol to use the version with floating point of the conversion functions */
136 #define BLE_ADC_OUTPUT_FLOAT
137
138 /**
139 * @}
140 */
141
142
143 /* Private macros ------------------------------------------------------------*/
144 /** @defgroup ADC_LL_Private_Macros ADC Private Macros
145 * @{
146 */
147
148
149 /**
150 * @}
151 */
152
153
154 /* Exported types ------------------------------------------------------------*/
155 #if defined(USE_FULL_LL_DRIVER)
156 /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
157 * @{
158 */
159
160 /**
161 * @brief Structure definition with common setting for the ADC.
162 */
163 typedef struct
164 {
165 FunctionalState ContinuousConvMode; /*!< Specify whether the conversion is performed in single mode (one conversion)
166 or continuous mode for ADC group regular, after the first ADC conversion
167 start trigger occurred (software start or external trigger). This parameter
168 can be set to ENABLE or DISABLE.
169 This feature can be modified afterwards using unitary function
170 @ref LL_ADC_ContinuousModeEnable() or @ref LL_ADC_ContinuousModeDisable().*/
171
172 uint32_t SequenceLength; /*!< Specify the length of the conversion sequence.
173 This parameter must be a number between Min_Data = 1 and Max_Data = 16.
174 This feature can be modified afterwards using unitary function
175 @ref LL_ADC_SetSequenceLength(). */
176
177 uint32_t SamplingMode; /*!< Specifies the input sampling mode.
178 This parameter can be a value of @ref ADC_LL_SAMPLING_METHOD.
179 This feature can be modified afterwards using unitary function
180 @ref LL_ADC_SetInputSamplingMode(). */
181
182 uint32_t SampleRate; /*!< Specify the ADC sample rate.
183 This parameter can be a value of @ref ADC_LL_SAMPLE_RATE.
184 This feature can be modified afterwards using unitary function
185 @ref LL_ADC_SetSampleRate(). */
186
187 uint32_t Overrun; /*!< Specifies the overrung policy applied to the data.
188 This parameter can be a value of @ref ADC_LL_OVERRUN_CONFIG.
189 This feature can be modified afterwards using unitary function
190 @ref LL_ADC_SetOverrunDS(). */
191 } LL_ADC_InitTypeDef;
192
193
194 /**
195 * @brief Structure definition containing the input voltage range
196 * for each type of ADC input channel.
197 */
198 typedef struct
199 {
200 uint32_t InputVinm0_Vinp0Vinm0; /*!< Set the input voltage range for single VINM0 or differential (VINP0 - VINM0).
201 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
202 This feature can be modified afterwards using unitary function
203 @ref LL_ADC_SetChannelVoltageRange(). */
204
205 uint32_t InputVinm1_Vinp1Vinm1; /*!< Set the input voltage range for single VINM1 or differential (VINP1 - VINM1).
206 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
207 This feature can be modified afterwards using unitary function
208 @ref LL_ADC_SetChannelVoltageRange(). */
209
210 uint32_t InputVinm2_Vinp2Vinm2; /*!< Set the input voltage range for single VINM2 or differential (VINP2 - VINM2).
211 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
212 This feature can be modified afterwards using unitary function
213 @ref LL_ADC_SetChannelVoltageRange(). */
214
215 uint32_t InputVinm3_Vinp3Vinm3; /*!< Set the input voltage range for single VINM3 or differential (VINP3 - VINM3).
216 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
217 This feature can be modified afterwards using unitary function
218 @ref LL_ADC_SetChannelVoltageRange(). */
219
220 uint32_t InputVinp0; /*!< Set the input voltage range for single VINP0.
221 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
222 This feature can be modified afterwards using unitary function
223 @ref LL_ADC_SetChannelVoltageRange(). */
224
225 uint32_t InputVinp1; /*!< Set the input voltage range for single VINP1.
226 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
227 This feature can be modified afterwards using unitary function
228 @ref LL_ADC_SetChannelVoltageRange(). */
229
230 uint32_t InputVinp2; /*!< Set the input voltage range for single VINP2.
231 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
232 This feature can be modified afterwards using unitary function
233 @ref LL_ADC_SetChannelVoltageRange(). */
234
235 uint32_t InputVinp3; /*!< Set the input voltage range for single VINP3.
236 This parameter can be a value of @ref ADC_LL_INPUT_VOLTAGE_RANGE
237 This feature can be modified afterwards using unitary function
238 @ref LL_ADC_SetChannelVoltageRange(). */
239
240 } LL_ADC_VoltRangeInitTypeDef;
241
242
243 /**
244 * @brief Structure definition with the input channel entry
245 * for each element of the conversion sequence.
246 */
247 typedef struct
248 {
249 uint32_t ChannelForSeq0; /*!< Set the channel number code for the 1st conversion of the sequence.
250 This parameter can be a value of @ref ADC_LL_CHANNEL
251 This feature can be modified afterwards using unitary function
252 @ref LL_ADC_SetSequencerRanks(). */
253
254 uint32_t ChannelForSeq1; /*!< Set the channel number code for the 2nd conversion of the sequence.
255 This parameter can be a value of @ref ADC_LL_CHANNEL
256 This feature can be modified afterwards using unitary function
257 @ref LL_ADC_SetSequencerRanks(). */
258
259 uint32_t ChannelForSeq2; /*!< Set the channel number code for the 3rd conversion of the sequence.
260 This parameter can be a value of @ref ADC_LL_CHANNEL
261 This feature can be modified afterwards using unitary function
262 @ref LL_ADC_SetSequencerRanks(). */
263
264 uint32_t ChannelForSeq3; /*!< Set the channel number code for the 4th conversion of the sequence.
265 This parameter can be a value of @ref ADC_LL_CHANNEL
266 This feature can be modified afterwards using unitary function
267 @ref LL_ADC_SetSequencerRanks(). */
268
269 uint32_t ChannelForSeq4; /*!< Set the channel number code for the 5th conversion of the sequence.
270 This parameter can be a value of @ref ADC_LL_CHANNEL
271 This feature can be modified afterwards using unitary function
272 @ref LL_ADC_SetSequencerRanks(). */
273
274 uint32_t ChannelForSeq5; /*!< Set the channel number code for the 6th conversion of the sequence.
275 This parameter can be a value of @ref ADC_LL_CHANNEL
276 This feature can be modified afterwards using unitary function
277 @ref LL_ADC_SetSequencerRanks(). */
278
279 uint32_t ChannelForSeq6; /*!< Set the channel number code for the 7th conversion of the sequence.
280 This parameter can be a value of @ref ADC_LL_CHANNEL
281 This feature can be modified afterwards using unitary function
282 @ref LL_ADC_SetSequencerRanks(). */
283
284 uint32_t ChannelForSeq7; /*!< Set the channel number code for the 8th conversion of the sequence.
285 This parameter can be a value of @ref ADC_LL_CHANNEL
286 This feature can be modified afterwards using unitary function
287 @ref LL_ADC_SetSequencerRanks(). */
288
289 uint32_t ChannelForSeq8; /*!< Set the channel number code for the 9th conversion of the sequence.
290 This parameter can be a value of @ref ADC_LL_CHANNEL
291 This feature can be modified afterwards using unitary function
292 @ref LL_ADC_SetSequencerRanks(). */
293
294 uint32_t ChannelForSeq9; /*!< Set the channel number code for the 10th conversion of the sequence.
295 This parameter can be a value of @ref ADC_LL_CHANNEL
296 This feature can be modified afterwards using unitary function
297 @ref LL_ADC_SetSequencerRanks(). */
298
299 uint32_t ChannelForSeq10; /*!< Set the channel number code for the 11th conversion of the sequence.
300 This parameter can be a value of @ref ADC_LL_CHANNEL
301 This feature can be modified afterwards using unitary function
302 @ref LL_ADC_SetSequencerRanks(). */
303
304 uint32_t ChannelForSeq11; /*!< Set the channel number code for the 12th conversion of the sequence.
305 This parameter can be a value of @ref ADC_LL_CHANNEL
306 This feature can be modified afterwards using unitary function
307 @ref LL_ADC_SetSequencerRanks(). */
308
309 uint32_t ChannelForSeq12; /*!< Set the channel number code for the 13th conversion of the sequence.
310 This parameter can be a value of @ref ADC_LL_CHANNEL
311 This feature can be modified afterwards using unitary function
312 @ref LL_ADC_SetSequencerRanks(). */
313
314 uint32_t ChannelForSeq13; /*!< Set the channel number code for the 14th conversion of the sequence.
315 This parameter can be a value of @ref ADC_LL_CHANNEL
316 This feature can be modified afterwards using unitary function
317 @ref LL_ADC_SetSequencerRanks(). */
318
319 uint32_t ChannelForSeq14; /*!< Set the channel number code for the 15th conversion of the sequence.
320 This parameter can be a value of @ref ADC_LL_CHANNEL
321 This feature can be modified afterwards using unitary function
322 @ref LL_ADC_SetSequencerRanks(). */
323
324 uint32_t ChannelForSeq15; /*!< Set the channel number code for the 16th conversion of the sequence.
325 This parameter can be a value of @ref ADC_LL_CHANNEL
326 This feature can be modified afterwards using unitary function
327 @ref LL_ADC_SetSequencerRanks(). */
328
329 } LL_ADC_SequenceInitTypeDef;
330
331 /**
332 * @}
333 */
334
335 #endif /* USE_FULL_LL_DRIVER */
336
337 /* Exported constants --------------------------------------------------------*/
338
339
340 /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
341 * @{
342 */
343
344
345 /** @defgroup ADC_LL_SAMPLING_METHOD ADC input sampling method definitions
346 * @brief It defines the parameters used for the functions @ref LL_ADC_SetInputSamplingMode()
347 * and @ref LL_ADC_GetInputSamplingMode()
348 * @{
349 */
350
351 #define LL_ADC_SAMPLING_AT_START (0x00000000UL) /*!< Sampling only at conversion start */
352 #define LL_ADC_SAMPLING_AT_END (ADC_CONF_ADC_CONT_1V2) /*!< Sampling starts at the end of conversion (default)*/
353
354 /**
355 * @}
356 */
357
358
359 /** @defgroup ADC_LL_OVERRUN_CONFIG ADC overrun configuration definitions
360 * @brief It defines the parameters used for the functions @ref LL_ADC_SetOverrunDF(), @ref LL_ADC_GetOverrunDF(),
361 * @ref LL_ADC_SetOverrunDS(), and @ref LL_ADC_GetOverrunDS()
362 * @{
363 */
364
365 #define LL_ADC_NEW_DATA_IS_LOST (0x00000000UL) /*!< Previous data is preserved, new data is lost. */
366 #define LL_ADC_NEW_DATA_IS_KEPT (ADC_CONF_OVR_DS_CFG) /*!< Previous data is overwritten, new data is kept. */
367
368 /**
369 * @}
370 */
371
372 /** @defgroup ADC_LL_SAMPLE_RATE ADC sample rate definitions
373 * @brief It defines the parameters used for the functions @ref LL_ADC_SetSampleRate()
374 * and @ref LL_ADC_GetSampleRate()
375 * The ADC conversion rate is: System clock / (16 + 16*SAMPLE_RATE_MSB + 4*SAMPLE_RATE)
376 * @{
377 */
378 #define LL_ADC_SAMPLE_RATE_16 (0x0UL) /*!< ADC conversion rate at F_ADC_CLK / 16 */
379 #define LL_ADC_SAMPLE_RATE_20 (0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC conversion rate at F_ADC_CLK / 20 */
380 #define LL_ADC_SAMPLE_RATE_24 (0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC conversion rate at F_ADC_CLK / 24 */
381 #define LL_ADC_SAMPLE_RATE_28 (0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC conversion rate at F_ADC_CLK / 28 */
382
383 #if defined(ADC_CONF_SAMPLE_RATE_MSB)
384 #define LL_ADC_SAMPLE_RATE_32 (0x1UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
385 conversion rate at F_ADC_CLK / 32 */
386 #define LL_ADC_SAMPLE_RATE_36 (0x1UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
387 conversion rate at F_ADC_CLK / 36 */
388 #define LL_ADC_SAMPLE_RATE_40 (0x1UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
389 conversion rate at F_ADC_CLK / 40 */
390 #define LL_ADC_SAMPLE_RATE_44 (0x1UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
391 conversion rate at F_ADC_CLK / 44 */
392 #define LL_ADC_SAMPLE_RATE_48 (0x2UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
393 conversion rate at F_ADC_CLK / 48 */
394 #define LL_ADC_SAMPLE_RATE_52 (0x2UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
395 conversion rate at F_ADC_CLK / 52 */
396 #define LL_ADC_SAMPLE_RATE_56 (0x2UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
397 conversion rate at F_ADC_CLK / 56 */
398 #define LL_ADC_SAMPLE_RATE_60 (0x2UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
399 conversion rate at F_ADC_CLK / 60 */
400 #define LL_ADC_SAMPLE_RATE_64 (0x3UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
401 conversion rate at F_ADC_CLK / 64 */
402 #define LL_ADC_SAMPLE_RATE_68 (0x3UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
403 conversion rate at F_ADC_CLK / 68 */
404 #define LL_ADC_SAMPLE_RATE_72 (0x3UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
405 conversion rate at F_ADC_CLK / 72 */
406 #define LL_ADC_SAMPLE_RATE_76 (0x3UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
407 conversion rate at F_ADC_CLK / 76 */
408 #define LL_ADC_SAMPLE_RATE_80 (0x4UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
409 conversion rate at F_ADC_CLK / 80 */
410 #define LL_ADC_SAMPLE_RATE_84 (0x4UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
411 conversion rate at F_ADC_CLK / 84 */
412 #define LL_ADC_SAMPLE_RATE_88 (0x4UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
413 conversion rate at F_ADC_CLK / 88 */
414 #define LL_ADC_SAMPLE_RATE_92 (0x4UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
415 conversion rate at F_ADC_CLK / 92 */
416 #define LL_ADC_SAMPLE_RATE_96 (0x5UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
417 conversion rate at F_ADC_CLK / 96 */
418 #define LL_ADC_SAMPLE_RATE_100 (0x5UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
419 conversion rate at F_ADC_CLK / 100 */
420 #define LL_ADC_SAMPLE_RATE_104 (0x5UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
421 conversion rate at F_ADC_CLK / 104 */
422 #define LL_ADC_SAMPLE_RATE_108 (0x5UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
423 conversion rate at F_ADC_CLK / 108 */
424 #define LL_ADC_SAMPLE_RATE_112 (0x6UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
425 conversion rate at F_ADC_CLK / 112 */
426 #define LL_ADC_SAMPLE_RATE_116 (0x6UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
427 conversion rate at F_ADC_CLK / 116 */
428 #define LL_ADC_SAMPLE_RATE_120 (0x6UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
429 conversion rate at F_ADC_CLK / 120 */
430 #define LL_ADC_SAMPLE_RATE_124 (0x6UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
431 conversion rate at F_ADC_CLK / 124 */
432 #define LL_ADC_SAMPLE_RATE_128 (0x7UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x0UL) /*!< ADC
433 conversion rate at F_ADC_CLK / 128 */
434 #define LL_ADC_SAMPLE_RATE_132 (0x7UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x1UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
435 conversion rate at F_ADC_CLK / 132 */
436 #define LL_ADC_SAMPLE_RATE_136 (0x7UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x2UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
437 conversion rate at F_ADC_CLK / 136 */
438 #define LL_ADC_SAMPLE_RATE_140 (0x7UL << ADC_CONF_SAMPLE_RATE_MSB_Pos | 0x3UL << ADC_CONF_SAMPLE_RATE_Pos) /*!< ADC
439 conversion rate at F_ADC_CLK / 140 */
440 #endif /* ADC_CONF_SAMPLE_RATE_MSB */
441 /**
442 * @}
443 */
444
445 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
446 /** @defgroup ADC_LL_OP_MODE ADC operation modes definitions
447 * @brief It defines the parameters used for the functions @ref LL_ADC_SetADCMode() and @ref LL_ADC_GetADCMode()
448 * @{
449 */
450
451 #define LL_ADC_OP_MODE_AUDIO (0x1UL << ADC_CONF_OP_MODE_Pos) /*!< ADC operation mode AUDIO */
452 #define LL_ADC_OP_MODE_ADC (0x2UL << ADC_CONF_OP_MODE_Pos) /*!< ADC operation mode ADC */
453 #define LL_ADC_OP_MODE_FULL (0x3UL << ADC_CONF_OP_MODE_Pos) /*!< ADC operation Full mode */
454
455 /**
456 * @}
457 */
458
459 /** @defgroup ADC_LL_OCM_SOURCE ADC occasional mode source definitions
460 * @brief It defines the parameters used for the functions @ref LL_ADC_SetOccasionalConversionSource()
461 * and @ref LL_ADC_GetOccasionalConversionSource()
462 * @{
463 */
464
465 #define LL_ADC_OCM_SRC_VBAT (0UL) /*!< ADC occasional mode source VBAT */
466 #define LL_ADC_OCM_SRC_TEMP (1UL) /*!< ADC occasional mode source temperature sensor */
467
468 /**
469 * @}
470 */
471
472 /** @defgroup ADC_LL_PGA_BIAS ADC microphone bias voltage definitions
473 * @brief It defines the parameters used for the functions @ref LL_ADC_SetMicrophonePGABias()
474 * and @ref LL_ADC_GetMicrophonePGABias()
475 * @{
476 */
477
478 #define LL_ADC_PGA_BIAS_050_BAT (0x00000000UL) /*!< Set the microphone bias voltage at 0.50 V */
479 #define LL_ADC_PGA_BIAS_055_BAT (0x1UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.55 V */
480 #define LL_ADC_PGA_BIAS_060_BAT (0x2UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.60 V */
481 #define LL_ADC_PGA_BIAS_065_BAT (0x3UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.65 V */
482 #define LL_ADC_PGA_BIAS_070_BAT (0x4UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.70 V */
483 #define LL_ADC_PGA_BIAS_075_BAT (0x5UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.75 V */
484 #define LL_ADC_PGA_BIAS_080_BAT (0x6UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.80 V */
485 #define LL_ADC_PGA_BIAS_090_BAT (0x7UL << ADC_PGA_CONF_PGA_BIAS_Pos) /*!< Set the microphone bias voltage at 0.90 V */
486
487 /**
488 * @}
489 */
490
491
492 /** @defgroup ADC_LL_PGA_GAIN ADC microphone gain definitions
493 * @brief It defines the parameters used for the functions @ref LL_ADC_SetMicrophonePGAGain()
494 * and @ref LL_ADC_GetMicrophonePGAGain()
495 * @{
496 */
497
498 #define LL_ADC_PGA_GAIN_00_DB (0x00000000UL) /*!< Set the microphone gain at 0 dB */
499 #define LL_ADC_PGA_GAIN_03_DB (0x00000001UL) /*!< Set the microphone gain at 3 dB */
500 #define LL_ADC_PGA_GAIN_06_DB (0x00000002UL) /*!< Set the microphone gain at 6 dB */
501 #define LL_ADC_PGA_GAIN_09_DB (0x00000003UL) /*!< Set the microphone gain at 9 dB */
502 #define LL_ADC_PGA_GAIN_12_DB (0x00000004UL) /*!< Set the microphone gain at 12 dB */
503 #define LL_ADC_PGA_GAIN_15_DB (0x00000005UL) /*!< Set the microphone gain at 15 dB */
504 #define LL_ADC_PGA_GAIN_18_DB (0x00000006UL) /*!< Set the microphone gain at 18 dB */
505 #define LL_ADC_PGA_GAIN_21_DB (0x00000007UL) /*!< Set the microphone gain at 21 dB */
506 #define LL_ADC_PGA_GAIN_24_DB (0x00000008UL) /*!< Set the microphone gain at 24 dB */
507 #define LL_ADC_PGA_GAIN_27_DB (0x00000009UL) /*!< Set the microphone gain at 27 dB */
508 #define LL_ADC_PGA_GAIN_30_DB (0x0000000AUL) /*!< Set the microphone gain at 30 dB */
509
510 /**
511 * @}
512 */
513 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
514
515 /** @defgroup ADC_LL_INPUT_VOLTAGE_RANGE ADC input voltage range definitions
516 * @brief It defines the parameters used for the functions @ref LL_ADC_SetChannelVoltageRange()
517 * and @ref LL_ADC_GetChannelVoltageRange()
518 * @{
519 */
520
521 #define LL_ADC_VIN_RANGE_1V2 (0UL) /*!< ADC input voltage range up to 1.2 V */
522 #define LL_ADC_VIN_RANGE_2V4 (2UL) /*!< ADC input voltage range up to 2.4 V */
523 #define LL_ADC_VIN_RANGE_3V6 (3UL) /*!< ADC input voltage range up to 3.6 V */
524
525 /**
526 * @}
527 */
528
529
530 /** @defgroup ADC_LL_DEFAULT_RANGE_VALUE ADC default range value definitions
531 * @brief It defines the parameters used as default range value
532 * @{
533 */
534
535 #define LL_ADC_DEFAULT_RANGE_VALUE_1V2 (0xFFFUL) /*!< ADC default range value up to 1.2 V */
536 #define LL_ADC_DEFAULT_RANGE_VALUE_2V4 (0x7FFUL) /*!< ADC default range value up to 2.4 V */
537 #define LL_ADC_DEFAULT_RANGE_VALUE_3V6 (0x555UL) /*!< ADC default range value up to 3.6 V */
538
539 /**
540 * @}
541 */
542
543 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
544 /** @defgroup ADC_LL_DF_DYN_RANGE ADC Decimation Filter dynamic range definitions
545 * @brief It defines the parameters used for the functions @ref LL_ADC_SetDFInputDynamic()
546 * and @ref LL_ADC_GetDFInputDynamic()
547 * @{
548 */
549
550 #define LL_ADC_DF_DYN_RANGE_FULL (0x00000000UL) /*!< ADC Decimation Filter dynamic
551 full range */
552 #define LL_ADC_DF_DYN_RANGE_HALF (0x1UL << ADC_DF_CONF_DF_HALF_D_EN_Pos) /*!< ADC Decimation Filter dynamic
553 half range */
554
555 /**
556 * @}
557 */
558
559
560 /** @defgroup ADC_LL_MIC_CHANNEL ADC microphone channel definitions
561 * @brief It defines the parameters used for the functions @ref LL_ADC_SetMicrophoneChannel()
562 * and @ref LL_ADC_GetMicrophoneChannel()
563 * @{
564 */
565
566 #define LL_ADC_DF_MIC_CH_RIGHT (0x00000000UL) /*!< ADC microphone channel right */
567 #define LL_ADC_DF_MIC_CH_LEFT (0x1UL << ADC_DF_CONF_DF_MICROL_RN_Pos) /*!< ADC microphone channel left */
568
569 /**
570 * @}
571 */
572
573
574 /** @defgroup ADC_LL_PDM_CLK_DIVIDER ADC PDM clock divider definitions
575 * @brief It defines the parameters used for the functions @ref LL_ADC_SetPDMRate() and @ref LL_ADC_GetPDMRate()
576 * @{
577 */
578
579 #define LL_ADC_PDM_DIV_10 (0x00000000UL) /*!< ADC PDM clock divider 10 */
580 #define LL_ADC_PDM_DIV_11 (0x1UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 11 */
581 #define LL_ADC_PDM_DIV_12 (0x2UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 12 */
582 #define LL_ADC_PDM_DIV_13 (0x3UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 13 */
583 #define LL_ADC_PDM_DIV_14 (0x4UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 14 */
584 #define LL_ADC_PDM_DIV_15 (0x5UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 15 */
585 #define LL_ADC_PDM_DIV_16 (0x6UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 16 */
586 #define LL_ADC_PDM_DIV_17 (0x7UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 17 */
587 #define LL_ADC_PDM_DIV_18 (0x8UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 18 */
588 #define LL_ADC_PDM_DIV_19 (0x9UL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 19 */
589 #define LL_ADC_PDM_DIV_20 (0xAUL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 20 */
590 #define LL_ADC_PDM_DIV_21 (0xBUL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 21 */
591 #define LL_ADC_PDM_DIV_22 (0xCUL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 22 */
592 #define LL_ADC_PDM_DIV_23 (0xDUL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 23 */
593 #define LL_ADC_PDM_DIV_24 (0xEUL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 24 */
594 #define LL_ADC_PDM_DIV_25 (0xFUL << ADC_DF_CONF_PDM_RATE_Pos) /*!< ADC PDM clock divider 25 */
595
596 /**
597 * @}
598 */
599
600
601 /** @defgroup ADC_LL_DATA_FORMAT ADC data format definitions
602 * @brief It defines the parameters used for the functions @ref LL_ADC_SetDataOutputFormat(),
603 * @ref LL_ADC_GetDataOutputFormat(), @ref LL_ADC_SetDataInputFormat() and @ref LL_ADC_GetDataInputFormat()
604 * @{
605 */
606
607 #define LL_ADC_DF_DATA_FORMAT_SIGNED (0UL) /*!< ADC data format signed */
608 #define LL_ADC_DF_DATA_FORMAT_UNSIGNED (1UL) /*!< ADC data format unsigned */
609
610 /**
611 * @}
612 */
613
614
615 /** @defgroup ADC_LL_CIC_DECIMATOR_FACTOR ADC CIC decimator factor definitions
616 * @brief It defines the parameters used for the functions @ref LL_ADC_SetCICDecimatorFactor()
617 * and @ref LL_ADC_GetCICDecimatorFactor()
618 * @{
619 */
620
621 #define LL_ADC_DF_CIC_DECIMATOR_FACTOR_HALF (ADC_DF_CONF_DF_CIC_DHF) /*!< ADC CIC decimator factor half */
622 #define LL_ADC_DF_CIC_DECIMATOR_FACTOR_INTEGER (0x00000000UL) /*!< ADC CIC decimator factor integer */
623
624 /**
625 * @}
626 */
627
628
629 /** @defgroup ADC_LL_MICROPHONE_OUT_FREQ ADC microphone output frequency definitions
630 * @brief It defines the parameters used for the functions @ref LL_ADC_SetMicrophoneOutputDatarate()
631 * and @ref LL_ADC_GetMicrophoneOutputDatarate()
632 * @{
633 */
634
635 #define LL_ADC_OUTPUT_FREQ_MIC_DIG_47619_HZ (0x0EUL) /*!< ADC digital microphone output frequency 47.619 kHz */
636 #define LL_ADC_OUTPUT_FREQ_MIC_DIG_44440_HZ (0x0FUL) /*!< ADC digital microphone output frequency 44.44 kHz */
637 #define LL_ADC_OUTPUT_FREQ_MIC_DIG_22220_HZ (0x1EUL) /*!< ADC digital microphone output frequency 22.22 kHz */
638 #define LL_ADC_OUTPUT_FREQ_MIC_DIG_15873_HZ (0x2AUL) /*!< ADC digital microphone output frequency 15.873 kHz */
639 #define LL_ADC_OUTPUT_FREQ_MIC_DIG_7936_HZ (0x54UL) /*!< ADC digital microphone output frequency 7.936 kHz */
640
641 #define LL_ADC_OUTPUT_FREQ_MIC_ANA_200000_HZ (0x02UL) /*!< ADC analog microphone output frequency 200.00 kHz */
642 #define LL_ADC_OUTPUT_FREQ_MIC_ANA_15873_HZ (0x15UL) /*!< ADC analog microphone output frequency 15.873 kHz */
643 #define LL_ADC_OUTPUT_FREQ_MIC_ANA_7936_HZ (0x2AUL) /*!< ADC analog microphone output frequency 7.936 kHz */
644
645 /**
646 * @}
647 */
648 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
649
650 /** @defgroup ADC_LL_DS_DATA_WIDTH ADC Down Sampler data width definitions
651 * @brief It defines the parameters used for the functions @ref LL_ADC_SetDSDataOutputWidth()
652 * and @ref LL_ADC_GetDSDataOutputWidth()
653 * @{
654 */
655
656 #define LL_ADC_DS_DATA_WIDTH_12_BIT (0UL) /*!< ADC Down Sampler data width 12 bits */
657 #define LL_ADC_DS_DATA_WIDTH_13_BIT (1UL) /*!< ADC Down Sampler data width 13 bits */
658 #define LL_ADC_DS_DATA_WIDTH_14_BIT (2UL) /*!< ADC Down Sampler data width 14 bits */
659 #define LL_ADC_DS_DATA_WIDTH_15_BIT (3UL) /*!< ADC Down Sampler data width 15 bits */
660 #define LL_ADC_DS_DATA_WIDTH_16_BIT (4UL) /*!< ADC Down Sampler data width 16 bits */
661
662 /**
663 * @}
664 */
665
666
667 /** @defgroup ADC_LL_DS_RATIO ADC Down Sampler ratio definitions
668 * @brief It defines the parameters used for the functions @ref LL_ADC_SetDSDataOutputRatio()
669 * and @ref LL_ADC_GetDSDataOutputRatio()
670 * @{
671 */
672
673 #define LL_ADC_DS_RATIO_1 (0UL) /*!< ADC Down Sampler ratio 1, no down sampling (default) */
674 #define LL_ADC_DS_RATIO_2 (1UL) /*!< ADC Down Sampler ratio 2 */
675 #define LL_ADC_DS_RATIO_4 (2UL) /*!< ADC Down Sampler ratio 4 */
676 #define LL_ADC_DS_RATIO_8 (3UL) /*!< ADC Down Sampler ratio 8 */
677 #define LL_ADC_DS_RATIO_16 (4UL) /*!< ADC Down Sampler ratio 16 */
678 #define LL_ADC_DS_RATIO_32 (5UL) /*!< ADC Down Sampler ratio 32 */
679 #define LL_ADC_DS_RATIO_64 (6UL) /*!< ADC Down Sampler ratio 64 */
680 #define LL_ADC_DS_RATIO_128 (7UL) /*!< ADC Down Sampler ratio 128 */
681
682 /**
683 * @}
684 */
685
686
687 /** @defgroup ADC_LL_CHANNEL ADC channel number code for conversion definitions
688 * @brief It defines the parameters used for the functions @ref LL_ADC_SetSequencerRanks()
689 * @{
690 */
691
692 #define LL_ADC_CHANNEL_VINM0 (0x00UL) /*!< ADC channel for VINM0 to single negative input */
693 #define LL_ADC_CHANNEL_VINM1 (0x01UL) /*!< ADC channel for VINM1 to single negative input */
694 #define LL_ADC_CHANNEL_VINM2 (0x02UL) /*!< ADC channel for VINM2 to single negative input */
695 #define LL_ADC_CHANNEL_VINM3 (0x03UL) /*!< ADC channel for VINM3 to single negative input */
696 #define LL_ADC_CHANNEL_VINP0 (0x04UL) /*!< ADC channel for VINP0 to single positive input */
697 #define LL_ADC_CHANNEL_VINP1 (0x05UL) /*!< ADC channel for VINP1 to single positive input */
698 #define LL_ADC_CHANNEL_VINP2 (0x06UL) /*!< ADC channel for VINP2 to single positive input */
699 #define LL_ADC_CHANNEL_VINP3 (0x07UL) /*!< ADC channel for VINP3 to single positive input */
700 #define LL_ADC_CHANNEL_VINP0_VINM0 (0x08UL) /*!< ADC channel for VINP0 - VINM0 to differential input */
701 #define LL_ADC_CHANNEL_VINP1_VINM1 (0x09UL) /*!< ADC channel for VINP1 - VINM1 to differential input */
702 #define LL_ADC_CHANNEL_VINP2_VINM2 (0x0AUL) /*!< ADC channel for VINP2 - VINM2 to differential input */
703 #define LL_ADC_CHANNEL_VINP3_VINM3 (0x0BUL) /*!< ADC channel for VINP3 - VINM3 to differential input */
704 #define LL_ADC_CHANNEL_VBAT (0x0CUL) /*!< ADC channel for VBAT, battery level detector */
705 #define LL_ADC_CHANNEL_TEMPSENSOR (0x0DUL) /*!< ADC channel for temperature sensor */
706
707 /**
708 * @}
709 */
710
711 /** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC - Sequencer ranks
712 * @{
713 */
714 #define LL_ADC_RANK_1 (ADC_SEQ_1_REGOFFSET | ADC_RANK_1_SEQ_X_BITOFFSET_POS) /*!< ADC rank 1 */
715 #define LL_ADC_RANK_2 (ADC_SEQ_1_REGOFFSET | ADC_RANK_2_SEQ_X_BITOFFSET_POS) /*!< ADC rank 2 */
716 #define LL_ADC_RANK_3 (ADC_SEQ_1_REGOFFSET | ADC_RANK_3_SEQ_X_BITOFFSET_POS) /*!< ADC rank 3 */
717 #define LL_ADC_RANK_4 (ADC_SEQ_1_REGOFFSET | ADC_RANK_4_SEQ_X_BITOFFSET_POS) /*!< ADC rank 4 */
718 #define LL_ADC_RANK_5 (ADC_SEQ_1_REGOFFSET | ADC_RANK_5_SEQ_X_BITOFFSET_POS) /*!< ADC rank 5 */
719 #define LL_ADC_RANK_6 (ADC_SEQ_1_REGOFFSET | ADC_RANK_6_SEQ_X_BITOFFSET_POS) /*!< ADC rank 6 */
720 #define LL_ADC_RANK_7 (ADC_SEQ_1_REGOFFSET | ADC_RANK_7_SEQ_X_BITOFFSET_POS) /*!< ADC rank 7 */
721 #define LL_ADC_RANK_8 (ADC_SEQ_1_REGOFFSET | ADC_RANK_8_SEQ_X_BITOFFSET_POS) /*!< ADC rank 8 */
722 #define LL_ADC_RANK_9 (ADC_SEQ_2_REGOFFSET | ADC_RANK_9_SEQ_X_BITOFFSET_POS) /*!< ADC rank 9 */
723 #define LL_ADC_RANK_10 (ADC_SEQ_2_REGOFFSET | ADC_RANK_10_SEQ_X_BITOFFSET_POS) /*!< ADC rank 10 */
724 #define LL_ADC_RANK_11 (ADC_SEQ_2_REGOFFSET | ADC_RANK_11_SEQ_X_BITOFFSET_POS) /*!< ADC rank 11 */
725 #define LL_ADC_RANK_12 (ADC_SEQ_2_REGOFFSET | ADC_RANK_12_SEQ_X_BITOFFSET_POS) /*!< ADC rank 12 */
726 #define LL_ADC_RANK_13 (ADC_SEQ_2_REGOFFSET | ADC_RANK_13_SEQ_X_BITOFFSET_POS) /*!< ADC rank 13 */
727 #define LL_ADC_RANK_14 (ADC_SEQ_2_REGOFFSET | ADC_RANK_14_SEQ_X_BITOFFSET_POS) /*!< ADC rank 14 */
728 #define LL_ADC_RANK_15 (ADC_SEQ_2_REGOFFSET | ADC_RANK_15_SEQ_X_BITOFFSET_POS) /*!< ADC rank 15 */
729 #define LL_ADC_RANK_16 (ADC_SEQ_2_REGOFFSET | ADC_RANK_16_SEQ_X_BITOFFSET_POS) /*!< ADC rank 16 */
730 /**
731 * @}
732 */
733
734 /** @defgroup ADC_LL_CALIB_POINT ADC calibration points definitions
735 * @brief It defines the parameters used for the functions
736 * @ref LL_ADC_SetCalibPointForDiff(), @ref LL_ADC_GetCalibPointForDiff(),
737 * @ref LL_ADC_SetCalibPointForSinglePos(), @ref LL_ADC_GetCalibPointForSinglePos(),
738 * @ref LL_ADC_SetCalibPointForSingleNeg(), @ref LL_ADC_GetCalibPointForSingleNeg(),
739 * @{
740 */
741
742 #define LL_ADC_CALIB_POINT_1 (0x00UL) /*!< ADC calibration point 1 */
743 #define LL_ADC_CALIB_POINT_2 (0x01UL) /*!< ADC calibration point 2 */
744 #define LL_ADC_CALIB_POINT_3 (0x02UL) /*!< ADC calibration point 3 */
745 #define LL_ADC_CALIB_POINT_4 (0x03UL) /*!< ADC calibration point 4 */
746
747 /**
748 * @}
749 */
750
751 /** @defgroup ADC_LL_AWD_CHANNEL ADC watchdog channel selection for bit mask definitions
752 * @brief It defines the parameters used for the functions @ref LL_ADC_SetAWDInputChannels()
753 * and @ref LL_ADC_GetAWDInputChannels()
754 * @{
755 */
756
757 #define LL_ADC_AWD_CH_VINM0 (ADC_WD_CONF_AWD_CHX_0 ) /*!< ADC watchdog channel selection: VINM0 to negative input */
758 #define LL_ADC_AWD_CH_VINM1 (ADC_WD_CONF_AWD_CHX_1 ) /*!< ADC watchdog channel selection: VINM1 to negative input */
759 #define LL_ADC_AWD_CH_VINM2 (ADC_WD_CONF_AWD_CHX_2 ) /*!< ADC watchdog channel selection: VINM2 to negative input */
760 #define LL_ADC_AWD_CH_VINM3 (ADC_WD_CONF_AWD_CHX_3 ) /*!< ADC watchdog channel selection: VINM3 to negative input */
761 #define LL_ADC_AWD_CH_VINP0 (ADC_WD_CONF_AWD_CHX_8 ) /*!< ADC watchdog channel selection: VINP0 to positive input */
762 #define LL_ADC_AWD_CH_VINP1 (ADC_WD_CONF_AWD_CHX_9 ) /*!< ADC watchdog channel selection: VINP1 to positive input */
763 #define LL_ADC_AWD_CH_VINP2 (ADC_WD_CONF_AWD_CHX_10) /*!< ADC watchdog channel selection: VINP2 to positive input */
764 #define LL_ADC_AWD_CH_VINP3 (ADC_WD_CONF_AWD_CHX_11) /*!< ADC watchdog channel selection: VINP3 to positive input */
765 #define LL_ADC_AWD_CH_MICROM (ADC_WD_CONF_AWD_CHX_4 ) /*!< ADC watchdog channel selection: MICROM to negative input */
766 #define LL_ADC_AWD_CH_MICROP (ADC_WD_CONF_AWD_CHX_12) /*!< ADC watchdog channel selection: MICROP to positive input */
767 #define LL_ADC_AWD_CH_VBAT (ADC_WD_CONF_AWD_CHX_5 ) /*!< ADC watchdog channel selection: VBAT to negative input */
768 #define LL_ADC_AWD_CH_TEMPSENSOR (ADC_WD_CONF_AWD_CHX_13) /*!< ADC watchdog channel selection: TEMP to positive input */
769 #define LL_ADC_AWD_CH_VDDA_NEG (ADC_WD_CONF_AWD_CHX_7 ) /*!< ADC watchdog channel selection: VDDA to negative input */
770 #define LL_ADC_AWD_CH_VDDA_POS (ADC_WD_CONF_AWD_CHX_15) /*!< ADC watchdog channel selection: VDDA to positive input */
771 #define LL_ADC_AWD_CH_GND_NEG (ADC_WD_CONF_AWD_CHX_6 ) /*!< ADC watchdog channel selection: GND to negative input */
772 #define LL_ADC_AWD_CH_GND_POS (ADC_WD_CONF_AWD_CHX_14) /*!< ADC watchdog channel selection: GND to positive input */
773
774 /**
775 * @}
776 */
777
778
779 /** @defgroup ADC_LL_IRQ_STATUS_MASK ADC IRQ_STATUS register mask definitions
780 * @brief It defines the IRQ flags used for the functions @ref LL_ADC_ClearActiveFlags()
781 * and @ref LL_ADC_GetActiveFlags().
782 * @{
783 */
784 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
785 #define LL_ADC_IRQ_FLAG_OVRFL (ADC_IRQ_STATUS_DF_OVRFL_IRQ) /*!< ADC IRQ flag OVRFL */
786 #define LL_ADC_IRQ_FLAG_OVRDF (ADC_IRQ_STATUS_OVR_DF_IRQ) /*!< ADC IRQ flag OVRDF */
787 #define LL_ADC_IRQ_FLAG_EODF (ADC_IRQ_STATUS_EODF_IRQ) /*!< ADC IRQ flag EODF */
788 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
789 #define LL_ADC_IRQ_FLAG_OVRDS (ADC_IRQ_STATUS_OVR_DS_IRQ) /*!< ADC IRQ flag OVRDS */
790 #define LL_ADC_IRQ_FLAG_AWD1 (ADC_IRQ_STATUS_AWD_IRQ) /*!< ADC IRQ flag AWD1 */
791 #define LL_ADC_IRQ_FLAG_EOC (ADC_IRQ_STATUS_EOC_IRQ) /*!< ADC IRQ flag EOC */
792 #define LL_ADC_IRQ_FLAG_EOS (ADC_IRQ_STATUS_EOS_IRQ) /*!< ADC IRQ flag EOS */
793 #define LL_ADC_IRQ_FLAG_EODS (ADC_IRQ_STATUS_EODS_IRQ) /*!< ADC IRQ flag EODS */
794
795 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
796 #define LL_ADC_IRQ_FLAGS_MASK (LL_ADC_IRQ_FLAG_OVRFL | \
797 LL_ADC_IRQ_FLAG_OVRDF | \
798 LL_ADC_IRQ_FLAG_OVRDS | \
799 LL_ADC_IRQ_FLAG_AWD1 | \
800 LL_ADC_IRQ_FLAG_EOC | \
801 LL_ADC_IRQ_FLAG_EOS | \
802 LL_ADC_IRQ_FLAG_EODF | \
803 LL_ADC_IRQ_FLAG_EODS)
804 #else
805 #define LL_ADC_IRQ_FLAGS_MASK (LL_ADC_IRQ_FLAG_OVRDS | \
806 LL_ADC_IRQ_FLAG_AWD1 | \
807 LL_ADC_IRQ_FLAG_EOC | \
808 LL_ADC_IRQ_FLAG_EOS | \
809 LL_ADC_IRQ_FLAG_EODS)
810 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
811
812 /**
813 * @}
814 */
815
816
817 /** @defgroup ADC_LL_IRQ_ENABLE ADC interrupts enable definitions
818 * @brief It defines the IRQ interrupt enable used for the functions @ref LL_ADC_ClearActiveFlags()
819 * and @ref LL_ADC_GetActiveFlags().
820 * @{
821 */
822
823 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
824 #define LL_ADC_IRQ_EN_OVRFL (ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA) /*!< ADC IRQ enable OVRFL */
825 #define LL_ADC_IRQ_EN_OVRDF (ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA) /*!< ADC IRQ enable OVRDF */
826 #define LL_ADC_IRQ_EN_EODF (ADC_IRQ_ENABLE_EODF_IRQ_ENA) /*!< ADC IRQ enable EODF */
827 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
828 #define LL_ADC_IRQ_EN_OVRDS (ADC_IRQ_ENABLE_OVR_DS_IRQ_ENA) /*!< ADC IRQ enable OVRDS */
829 #define LL_ADC_IRQ_EN_AWD1 (ADC_IRQ_ENABLE_AWD_IRQ_ENA) /*!< ADC IRQ enable AWD1 */
830 #define LL_ADC_IRQ_EN_EOC (ADC_IRQ_ENABLE_EOC_IRQ_ENA) /*!< ADC IRQ enable EOC */
831 #define LL_ADC_IRQ_EN_EOS (ADC_IRQ_ENABLE_EOS_IRQ_ENA) /*!< ADC IRQ enable EOS */
832 #define LL_ADC_IRQ_EN_EODS (ADC_IRQ_ENABLE_EODS_IRQ_ENA) /*!< ADC IRQ enable EODS */
833
834 /**
835 * @}
836 */
837
838 /**
839 * @}
840 */
841
842
843 /* Exported macro ------------------------------------------------------------*/
844 /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
845 * @{
846 */
847
848 /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
849 * @{
850 */
851
852 /**
853 * @brief Driver macro reserved for internal use: set a pointer to
854 * a register from a register basis from which an offset
855 * is applied.
856 * @param __REG__ Register basis from which the offset is applied.
857 * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
858 * @retval Pointer to register address
859 */
860 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
861 ((__IO uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL))))
862
863 /**
864 * @}
865 */
866
867 /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
868 * @{
869 */
870
871 #define LL_ADC_TEMPERATURE_CALC_ERROR ((int16_t)0x7FFF) /* Temperature calculation error using helper macro
872 @ref __LL_ADC_CALC_TEMPERATURE(), due to issue on
873 calibration parameters. This value is coded on 16 bits
874 (to fit on signed word or double word) and corresponds
875 to an inconsistent temperature value. */
876 /**
877 * @brief Helper macro to define the ADC conversion data full-scale digital
878 * value corresponding to the selected ADC resolution.
879 * @note ADC conversion data full-scale corresponds to voltage range
880 * determined by analog voltage references Vref+ and Vref-
881 * (refer to reference manual).
882 * @param __ADC_WIDTH__ This parameter can be one of the following values:
883 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
884 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
885 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
886 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
887 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
888 * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion data)
889 */
890 #define __LL_ADC_DIGITAL_SCALE(__ADC_WIDTH__) (0xFFFFUL >> ((LL_ADC_DS_DATA_WIDTH_16_BIT) - (__ADC_WIDTH__)))
891
892 /**
893 * @brief Helper macro to define the ADC conversion data full-scale analog
894 * voltage value corresponding to the selected ADC input range.
895 * @param __INPUT_VOLTAGE_RANGE__ This parameter can be one of the following values:
896 * @arg @ref LL_ADC_VIN_RANGE_3V6
897 * @arg @ref LL_ADC_VIN_RANGE_2V4
898 * @arg @ref LL_ADC_VIN_RANGE_1V2
899 * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion data)
900 */
901 #define __LL_ADC_REFERENCE_VOLTAGE(__INPUT_VOLTAGE_RANGE__) \
902 (((__INPUT_VOLTAGE_RANGE__) == LL_ADC_VIN_RANGE_1V2) ? 1250UL : ((__INPUT_VOLTAGE_RANGE__) * 1200UL))
903
904 /**
905 * @brief Helper macro to determine whether the selected channel
906 * corresponds to literal definitions of driver.
907 * @param __CHANNEL__ This parameter can be one of the following values:
908 * @arg @ref LL_ADC_CHANNEL_VINM0
909 * @arg @ref LL_ADC_CHANNEL_VINM1
910 * @arg @ref LL_ADC_CHANNEL_VINM2
911 * @arg @ref LL_ADC_CHANNEL_VINM3
912 * @arg @ref LL_ADC_CHANNEL_VINP0
913 * @arg @ref LL_ADC_CHANNEL_VINP1
914 * @arg @ref LL_ADC_CHANNEL_VINP2
915 * @arg @ref LL_ADC_CHANNEL_VINP3
916 * @arg @ref LL_ADC_CHANNEL_VINP0_VINM0
917 * @arg @ref LL_ADC_CHANNEL_VINP1_VINM1
918 * @arg @ref LL_ADC_CHANNEL_VINP2_VINM2
919 * @arg @ref LL_ADC_CHANNEL_VINP3_VINM3
920 * @arg @ref LL_ADC_CHANNEL_VBAT
921 * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
922 * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel
923 * (channel connected to a GPIO pin).
924 * Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
925 */
926 #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) ((__CHANNEL__) == (LL_ADC_CHANNEL_VBAT) \
927 || (__CHANNEL__) == (LL_ADC_CHANNEL_TEMPSENSOR) \
928 )
929
930 /**
931 * @brief Helper macro to convert the ADC conversion data from
932 * a resolution to another resolution.
933 * @param __DATA__ ADC conversion data to be converted
934 * @param __ADC_WIDTH_CURRENT__ Resolution of the data to be converted
935 * This parameter can be one of the following values:
936 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
937 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
938 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
939 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
940 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
941 * @param __ADC_WIDTH_TARGET__ Resolution of the data after conversion
942 * This parameter can be one of the following values:
943 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
944 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
945 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
946 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
947 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
948 * @retval ADC conversion data to the requested resolution
949 */
950 #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\
951 __ADC_WIDTH_CURRENT__,\
952 __ADC_WIDTH_TARGET__) \
953 (((__DATA__) \
954 << ((LL_ADC_DS_DATA_WIDTH_16_BIT) - (__ADC_WIDTH_CURRENT__))) \
955 >> ((LL_ADC_DS_DATA_WIDTH_16_BIT) - (__ADC_WIDTH_TARGET__)) \
956 )
957
958 /**
959 * @brief Helper macro to calculate the voltage (unit: mVolt)
960 * corresponding to a ADC conversion data (unit: digital value).
961 * @param __INPUT_VOLTAGE_RANGE__ Analog reference voltage (unit: mV)
962 * @arg @ref LL_ADC_VIN_RANGE_3V6
963 * @arg @ref LL_ADC_VIN_RANGE_2V4
964 * @arg @ref LL_ADC_VIN_RANGE_1V2
965 * @param __ADC_DATA__ ADC conversion data (unit: digital value).
966 * @param __ADC_WIDTH__ This parameter can be one of the following values:
967 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
968 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
969 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
970 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
971 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
972 * @retval ADC conversion data equivalent voltage value (unit: mVolt)
973 */
974 #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__INPUT_VOLTAGE_RANGE__,\
975 __ADC_DATA__,\
976 __ADC_WIDTH__) \
977 ((__ADC_DATA__) * (int32_t)(__LL_ADC_REFERENCE_VOLTAGE(__INPUT_VOLTAGE_RANGE__))\
978 / (int32_t)(__LL_ADC_DIGITAL_SCALE(__ADC_WIDTH__)) \
979 )
980
981 /**
982 * @brief Helper macro to calculate the voltage (unit: mVolt)
983 * corresponding to a ADC conversion data (unit: digital value) in
984 * differential ended mode.
985 * @note ADC data from ADC data register is unsigned and centered around
986 * middle code in. Converted voltage can be positive or negative
987 * depending on differential input voltages.
988 * @param __INPUT_VOLTAGE_RANGE__ Analog reference voltage (unit: mV)
989 * @arg @ref LL_ADC_VIN_RANGE_3V6
990 * @arg @ref LL_ADC_VIN_RANGE_2V4
991 * @arg @ref LL_ADC_VIN_RANGE_1V2
992 * @param __ADC_DATA__ ADC conversion data (unit: digital value).
993 * @param __ADC_WIDTH__ This parameter can be one of the following values:
994 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
995 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
996 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
997 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
998 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
999 * @retval ADC conversion data equivalent voltage value (unit: mVolt)
1000 */
1001 #define __LL_ADC_CALC_DIFF_DATA_TO_VOLTAGE(__INPUT_VOLTAGE_RANGE__,\
1002 __ADC_DATA__,\
1003 __ADC_WIDTH__) \
1004 ((int32_t)((__ADC_DATA__)) * (int32_t)(__LL_ADC_REFERENCE_VOLTAGE(__INPUT_VOLTAGE_RANGE__)) \
1005 / (int32_t)(__LL_ADC_DIGITAL_SCALE(__ADC_WIDTH__)) \
1006 - (int32_t)(__LL_ADC_REFERENCE_VOLTAGE(__INPUT_VOLTAGE_RANGE__) / 2 ) \
1007 )
1008
1009
1010 /**
1011 * @brief Helper macro to calculate the temperature (unit: degree Celsius)
1012 * from ADC conversion data of internal temperature sensor.
1013 * @note Computation is using temperature sensor calibration values
1014 * stored in system memory for each device during production.
1015 * @note Calculation formula:
1016 * Temperature = (55 / (C85 - C30)) * (TS_ADC_DATA - C30) + 30
1017 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1018 * C85 = equivalent TS_ADC_DATA at temperature
1019 * TEMP_DEGC_CAL1 (calibrated in factory)
1020 * C30 = equivalent TS_ADC_DATA at temperature
1021 * TEMP_DEGC_CAL2 (calibrated in factory)
1022 * Caution: Calculation relevancy under reserve that calibration
1023 * parameters are correct (address and data).
1024 * To calculate temperature using temperature sensor
1025 * datasheet typical values (generic values less, therefore
1026 * less accurate than calibrated values),
1027 * use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
1028 * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
1029 * temperature sensor (unit: digital value).
1030 * @param __ADC_WIDTH__ This parameter can be one of the following values:
1031 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
1032 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
1033 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
1034 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
1035 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
1036 * @retval Temperature (unit: degree Celsius)
1037 * In case or error, value LL_ADC_TEMPERATURE_CALC_ERROR is returned (inconsistent temperature value)
1038 */
1039 #if defined(TEMPSENSOR_TCK_ADDR)
1040 #define __LL_ADC_CALC_TEMPERATURE(__TEMPSENSOR_ADC_DATA__,\
1041 __ADC_WIDTH__) \
1042 (((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__),(__ADC_WIDTH__), LL_ADC_DS_DATA_WIDTH_12_BIT) \
1043 - (int32_t)*TEMPSENSOR_C30_ADDR + (int32_t)*TEMPSENSOR_TCK_ADDR) \
1044 / (10UL)) \
1045 )
1046 #else
1047 #define __LL_ADC_CALC_TEMPERATURE(__TEMPSENSOR_ADC_DATA__,\
1048 __ADC_WIDTH__) \
1049 ((((int32_t)*TEMPSENSOR_C85_ADDR - (int32_t)*TEMPSENSOR_C30_ADDR) != 0) \
1050 ? (((int32_t)(((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
1051 (__ADC_WIDTH__), \
1052 LL_ADC_DS_DATA_WIDTH_12_BIT) \
1053 - (int32_t)*TEMPSENSOR_C30_ADDR)) * 55L) \
1054 / ((int32_t)*TEMPSENSOR_C85_ADDR - (int32_t)*TEMPSENSOR_C30_ADDR)) \
1055 + TEMPSENSOR_C30_TEMP) \
1056 : \
1057 ((int32_t)LL_ADC_TEMPERATURE_CALC_ERROR) \
1058 )
1059 #endif /* TEMPSENSOR_TCK_ADDR */
1060
1061 /**
1062 * @brief Helper macro to calculate the temperature (unit: degree Celsius)
1063 * from ADC conversion data of internal temperature sensor.
1064 * @note Computation is using temperature sensor typical values
1065 * (refer to device datasheet).
1066 * @note Calculation formula:
1067 * Temperature = (Avg_Slope * (TS_ADC_DATA - VMIN) + TEMP_MIN
1068 *
1069 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1070 * Avg_Slope = (TEMP_MAX - TEMP_MIN) / (VMAX - VMIN))
1071 * TEMP_MIN = maximal temperature range of the sensor (unit: degC)
1072 * TEMP_MAX = maximal temperature range of the sensor (unit: degC)
1073 * VMIN = temperature sensor digital value at TEMP_MIN (unit: mV)
1074 * VMAX = temperature sensor digital value at TEMP_MAX (unit: mV)
1075 * Caution: Calculation relevancy under reserve the temperature sensor
1076 * of the current device has characteristics in line with
1077 * datasheet typical values.
1078 * If temperature sensor calibration values are available on
1079 * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
1080 * temperature calculation will be more accurate using
1081 * helper macro @ref __LL_ADC_CALC_TEMPERATURE().
1082 * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
1083 * @param __ADC_WIDTH__ This parameter can be one of the following values:
1084 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT
1085 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
1086 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
1087 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
1088 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
1089 * @retval Temperature (unit: degree Celsius)
1090 */
1091 #if defined(TEMPSENSOR_TCK_ADDR)
1092 #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_ADC_DATA__,\
1093 __ADC_WIDTH__) \
1094 (((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__),(__ADC_WIDTH__), LL_ADC_DS_DATA_WIDTH_12_BIT) \
1095 - 2500 + 300) \
1096 / (10UL)) \
1097 )
1098 #else
1099 #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_ADC_DATA__,\
1100 __ADC_WIDTH__) \
1101 (((((int32_t)(__LL_ADC_CONVERT_DATA_RESOLUTION(__TEMPSENSOR_ADC_DATA__, \
1102 __ADC_WIDTH__, \
1103 LL_ADC_DS_DATA_WIDTH_12_BIT)) - 2530L) \
1104 * 55L) / (2980L - 2530L)) + 30UL \
1105 )
1106 #endif /* TEMPSENSOR_TCK_ADDR */
1107
1108 /**
1109 * @brief Helper macro to convert the threshold value from mV to code for
1110 * single conversion or battery sensor.
1111 * @param __VOLTAGE_MV__ The voltage threshold for the ADC watchdog in mV.
1112 * @param __INPUT_VOLTAGE_RANGE__ Analog reference voltage (unit: mV)
1113 * @arg @ref LL_ADC_VIN_RANGE_3V6
1114 * @arg @ref LL_ADC_VIN_RANGE_2V4
1115 * @arg @ref LL_ADC_VIN_RANGE_1V2
1116 * @retval Returned 12-bit value to be used as ADC watchdog threshold.
1117 */
1118 #define LL_ADC_CONVERT_VOLTAGE_TO_DATA_AWD_THRESHOLD_SINGLE(__VOLTAGE_MV__,\
1119 __INPUT_VOLTAGE_RANGE__) \
1120 ((uint32_t)(((__VOLTAGE_MV__) * __LL_ADC_DIGITAL_SCALE(ADC_DS_DATA_WIDTH_12_BIT)) \
1121 / (__LL_ADC_REFERENCE_VOLTAGE(__INPUT_VOLTAGE_RANGE__))))
1122
1123 /**
1124 * @brief Helper macro to convert the threshold value from mV to code for
1125 * differential conversion.
1126 * @param __VOLTAGE_MV__ The voltage threshold for the ADC watchdog in mV.
1127 * @param __INPUT_VOLTAGE_RANGE__ Analog reference voltage (unit: mV)
1128 * @arg @ref LL_ADC_VIN_RANGE_3V6
1129 * @arg @ref LL_ADC_VIN_RANGE_2V4
1130 * @arg @ref LL_ADC_VIN_RANGE_1V2
1131 * @retval Returned 12-bit value to be used as ADC watchdog threshold.
1132 */
1133 #define LL_ADC_CONVERT_VOLTAGE_TO_DATA_AWD_THRESHOLD_DIFF(__VOLTAGE_MV__,\
1134 __INPUT_VOLTAGE_RANGE__) \
1135 ((uint32_t)((((__VOLTAGE_MV__) * __LL_ADC_DIGITAL_SCALE(ADC_DS_DATA_WIDTH_12_BIT)) \
1136 / (2UL * __LL_ADC_REFERENCE_VOLTAGE(__INPUT_VOLTAGE_RANGE__))) \
1137 + (__LL_ADC_DIGITAL_SCALE(ADC_DS_DATA_WIDTH_12_BIT) / 2UL)))
1138
1139 /**
1140 * @}
1141 */
1142
1143 /**
1144 * @}
1145 */
1146
1147
1148 /* Exported functions --------------------------------------------------------*/
1149 /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
1150 * @{
1151 */
1152
1153 /** @defgroup ADC_LL_EF_Configuration_ADC ADC Configuration functions
1154 * @{
1155 */
1156
1157 /**
1158 * @brief Select the input sampling method.
1159 * Sampling only at conversion start (default).
1160 * Sampling starts at the end of conversion.
1161 * @rmtoll CONF ADC_CONT_1V2 LL_ADC_SetInputSamplingMode
1162 * @param ADCx ADC instance
1163 * @param SamplingMode This parameter can be one of the following values:
1164 * @arg @ref LL_ADC_SAMPLING_AT_START
1165 * @arg @ref LL_ADC_SAMPLING_AT_END
1166 * @retval None
1167 */
LL_ADC_SetInputSamplingMode(ADC_TypeDef * ADCx,uint32_t SamplingMode)1168 __STATIC_INLINE void LL_ADC_SetInputSamplingMode(ADC_TypeDef *ADCx, uint32_t SamplingMode)
1169 {
1170 MODIFY_REG(ADCx->CONF, ADC_CONF_ADC_CONT_1V2, SamplingMode);
1171 }
1172
1173 /**
1174 * @brief Get input sampling mode.
1175 * @rmtoll CONF ADC_CONT_1V2 LL_ADC_GetInputSamplingMode
1176 * @param ADCx ADC instance
1177 * @retval Returned value can be one of the following values:
1178 * @arg @ref LL_ADC_SAMPLING_AT_START
1179 * @arg @ref LL_ADC_SAMPLING_AT_END
1180 */
LL_ADC_GetInputSamplingMode(const ADC_TypeDef * ADCx)1181 __STATIC_INLINE uint32_t LL_ADC_GetInputSamplingMode(const ADC_TypeDef *ADCx)
1182 {
1183 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_ADC_CONT_1V2));
1184 }
1185
1186 /**
1187 * @brief Enable the inversion of the ADC data output bits (1's complement)
1188 * when a differential input is connected to the ADC
1189 * @rmtoll CONF BIT_INVERT_DIFF LL_ADC_InvertOutputDiffModeEnable
1190 * @param ADCx ADC instance
1191 * @retval None
1192 */
LL_ADC_InvertOutputDiffModeEnable(ADC_TypeDef * ADCx)1193 __STATIC_INLINE void LL_ADC_InvertOutputDiffModeEnable(ADC_TypeDef *ADCx)
1194 {
1195 SET_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_DIFF);
1196 }
1197
1198 /**
1199 * @brief Disable the inversion of the ADC data output bits (1's complement)
1200 * when a differential input is connected to the ADC
1201 * @rmtoll CONF BIT_INVERT_DIFF LL_ADC_InvertOutputDiffModeDisable
1202 * @param ADCx ADC instance
1203 * @retval None
1204 */
LL_ADC_InvertOutputDiffModeDisable(ADC_TypeDef * ADCx)1205 __STATIC_INLINE void LL_ADC_InvertOutputDiffModeDisable(ADC_TypeDef *ADCx)
1206 {
1207 CLEAR_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_DIFF);
1208 }
1209
1210 /**
1211 * @brief Check if the inversion of the ADC data output bits (1's complement)
1212 * when a differential input is connected to the ADC is enabled.
1213 * @rmtoll CONF BIT_INVERT_DIFF LL_ADC_IsInvertOutputDiffModeEnabled
1214 * @param ADCx ADC instance
1215 * @retval 0: inversion is not enabled, 1: inversion is enabled.
1216 */
LL_ADC_IsInvertOutputDiffModeEnabled(const ADC_TypeDef * ADCx)1217 __STATIC_INLINE uint32_t LL_ADC_IsInvertOutputDiffModeEnabled(const ADC_TypeDef *ADCx)
1218 {
1219 return ((READ_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_DIFF) == (ADC_CONF_BIT_INVERT_DIFF)) ? 1UL : 0UL);
1220 }
1221
1222 /**
1223 * @brief Enable the inversion of the ADC data output bits (1's complement)
1224 * when a single negative input is connected to the ADC
1225 * @rmtoll CONF BIT_INVERT_SN LL_ADC_InvertOutputSingleNegModeEnable
1226 * @param ADCx ADC instance
1227 * @retval None
1228 */
LL_ADC_InvertOutputSingleNegModeEnable(ADC_TypeDef * ADCx)1229 __STATIC_INLINE void LL_ADC_InvertOutputSingleNegModeEnable(ADC_TypeDef *ADCx)
1230 {
1231 SET_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_SN);
1232 }
1233
1234 /**
1235 * @brief Disable the inversion of the ADC data output bits (1's complement)
1236 * when a single negative input is connected to the ADC
1237 * @rmtoll CONF BIT_INVERT_SN LL_ADC_InvertOutputSingleNegModeDisable
1238 * @param ADCx ADC instance
1239 * @retval None
1240 */
LL_ADC_InvertOutputSingleNegModeDisable(ADC_TypeDef * ADCx)1241 __STATIC_INLINE void LL_ADC_InvertOutputSingleNegModeDisable(ADC_TypeDef *ADCx)
1242 {
1243 CLEAR_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_SN);
1244 }
1245
1246 /**
1247 * @brief Check if the inversion of the ADC data output bits (1's complement)
1248 * when a single negative input is connected to the ADC is enabled.
1249 * @rmtoll CONF BIT_INVERT_SN LL_ADC_IsInvertOutputSingleNegModeEnabled
1250 * @param ADCx ADC instance
1251 * @retval 0: inversion is not enabled, 1: inversion is enabled.
1252 */
LL_ADC_IsInvertOutputSingleNegModeEnabled(const ADC_TypeDef * ADCx)1253 __STATIC_INLINE uint32_t LL_ADC_IsInvertOutputSingleNegModeEnabled(const ADC_TypeDef *ADCx)
1254 {
1255 return ((READ_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_SN) == (ADC_CONF_BIT_INVERT_SN)) ? 1UL : 0UL);
1256 }
1257
1258 #if defined(ADC_CONF_OVR_DF_CFG)
1259 /**
1260 * @brief Select the overrun configuration for the output data of
1261 * the Decimation Filter (DF).
1262 * Previous data is kept, the new one is lost.
1263 * Previous data is lost, the new one is kept.
1264 * @rmtoll CONF OVR_DF_CFG LL_ADC_SetOverrunDF
1265 * @param ADCx ADC instance
1266 * @param Overrun This parameter can be one of the following values:
1267 * @arg @ref LL_ADC_NEW_DATA_IS_LOST
1268 * @arg @ref LL_ADC_NEW_DATA_IS_KEPT
1269 * @retval None
1270 */
LL_ADC_SetOverrunDF(ADC_TypeDef * ADCx,uint32_t Overrun)1271 __STATIC_INLINE void LL_ADC_SetOverrunDF(ADC_TypeDef *ADCx, uint32_t Overrun)
1272 {
1273 MODIFY_REG(ADCx->CONF, ADC_CONF_OVR_DF_CFG, Overrun);
1274 }
1275
1276 /**
1277 * @brief Get the overrun configuration for the output data of
1278 * the Decimation Filter (DF).
1279 * Previous data is kept, the new one is lost.
1280 * Previous data is lost, the new one is kept.
1281 * @rmtoll CONF OVR_DF_CFG LL_ADC_GetOverrunDF
1282 * @param ADCx ADC instance
1283 * @retval Returned value can be one of the following values:
1284 * @arg @ref LL_ADC_NEW_DATA_IS_LOST
1285 * @arg @ref LL_ADC_NEW_DATA_IS_KEPT
1286 */
LL_ADC_GetOverrunDF(const ADC_TypeDef * ADCx)1287 __STATIC_INLINE uint32_t LL_ADC_GetOverrunDF(const ADC_TypeDef *ADCx)
1288 {
1289 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_OVR_DF_CFG));
1290 }
1291 #endif /* ADC_CONF_OVR_DF_CFG */
1292
1293 /**
1294 * @brief Select the overrun configuration for the output data of
1295 * the Down Sampler (DS).
1296 * Previous data is kept, the new one is lost.
1297 * Previous data is lost, the new one is kept.
1298 * @rmtoll CONF OVR_DS_CFG LL_ADC_SetOverrunDS
1299 * @param ADCx ADC instance
1300 * @param Overrun This parameter can be one of the following values:
1301 * @arg @ref LL_ADC_NEW_DATA_IS_LOST
1302 * @arg @ref LL_ADC_NEW_DATA_IS_KEPT
1303 * @retval None
1304 */
LL_ADC_SetOverrunDS(ADC_TypeDef * ADCx,uint32_t Overrun)1305 __STATIC_INLINE void LL_ADC_SetOverrunDS(ADC_TypeDef *ADCx, uint32_t Overrun)
1306 {
1307 MODIFY_REG(ADCx->CONF, ADC_CONF_OVR_DS_CFG, Overrun);
1308 }
1309
1310 /**
1311 * @brief Get the overrun configuration for the output data of
1312 * the Down Sampler (DS).
1313 * Previous data is kept, the new one is lost.
1314 * Previous data is lost, the new one is kept.
1315 * @rmtoll CONF OVR_DS_CFG LL_ADC_GetOverrunDS
1316 * @param ADCx ADC instance
1317 * @retval Returned value can be one of the following values:
1318 * @arg @ref LL_ADC_NEW_DATA_IS_LOST
1319 * @arg @ref LL_ADC_NEW_DATA_IS_KEPT
1320 */
LL_ADC_GetOverrunDS(const ADC_TypeDef * ADCx)1321 __STATIC_INLINE uint32_t LL_ADC_GetOverrunDS(const ADC_TypeDef *ADCx)
1322 {
1323 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_OVR_DS_CFG));
1324 }
1325
1326 #if defined(ADC_CONF_DMA_DF_ENA)
1327 /**
1328 * @brief Enable the DMA mode for the Decimation Filter (DF) data path.
1329 * @rmtoll CONF DMA_DF_ENA LL_ADC_DMAModeDFEnable
1330 * @param ADCx ADC instance
1331 * @retval None
1332 */
LL_ADC_DMAModeDFEnable(ADC_TypeDef * ADCx)1333 __STATIC_INLINE void LL_ADC_DMAModeDFEnable(ADC_TypeDef *ADCx)
1334 {
1335 SET_BIT(ADCx->CONF, ADC_CONF_DMA_DF_ENA);
1336 }
1337
1338 /**
1339 * @brief Disable the DMA mode for the Decimation Filter (DF) data path.
1340 * @rmtoll CONF DMA_DF_ENA LL_ADC_DMAModeDFDisable
1341 * @param ADCx ADC instance
1342 * @retval None
1343 */
LL_ADC_DMAModeDFDisable(ADC_TypeDef * ADCx)1344 __STATIC_INLINE void LL_ADC_DMAModeDFDisable(ADC_TypeDef *ADCx)
1345 {
1346 CLEAR_BIT(ADCx->CONF, ADC_CONF_DMA_DF_ENA);
1347 }
1348
1349
1350 /**
1351 * @brief Check if the DMA mode for the Decimation Filter (DF) data path is enabled.
1352 * @rmtoll CONF DMA_DF_ENA LL_ADC_IsDMAModeDFEnabled
1353 * @param ADCx ADC instance
1354 * @retval 0: DMA mode is not enabled, 1: DMA mode is enabled.
1355 */
LL_ADC_IsDMAModeDFEnabled(const ADC_TypeDef * ADCx)1356 __STATIC_INLINE uint32_t LL_ADC_IsDMAModeDFEnabled(const ADC_TypeDef *ADCx)
1357 {
1358 return ((READ_BIT(ADCx->CONF, ADC_CONF_DMA_DF_ENA) == (ADC_CONF_DMA_DF_ENA)) ? 1UL : 0UL);
1359 }
1360 #endif /* ADC_CONF_DMA_DF_ENA */
1361
1362 /**
1363 * @brief Enable the DMA mode for the Down Sampler (DS) data path.
1364 * @rmtoll CONF DMA_DS_ENA LL_ADC_DMAModeDSEnable
1365 * @param ADCx ADC instance
1366 * @retval None
1367 */
LL_ADC_DMAModeDSEnable(ADC_TypeDef * ADCx)1368 __STATIC_INLINE void LL_ADC_DMAModeDSEnable(ADC_TypeDef *ADCx)
1369 {
1370 SET_BIT(ADCx->CONF, ADC_CONF_DMA_DS_ENA);
1371 }
1372
1373
1374 /**
1375 * @brief Disable the DMA mode for the Down Sampler (DS) data path.
1376 * @rmtoll CONF DMA_DS_ENA LL_ADC_DMAModeDSDisable
1377 * @param ADCx ADC instance
1378 * @retval None
1379 */
LL_ADC_DMAModeDSDisable(ADC_TypeDef * ADCx)1380 __STATIC_INLINE void LL_ADC_DMAModeDSDisable(ADC_TypeDef *ADCx)
1381 {
1382 CLEAR_BIT(ADCx->CONF, ADC_CONF_DMA_DS_ENA);
1383 }
1384
1385
1386 /**
1387 * @brief Check if the DMA mode for the Down Sampler (DS) data path is enabled.
1388 * @rmtoll CONF DMA_DS_ENA LL_ADC_IsDMAModeDSEnabled
1389 * @param ADCx ADC instance
1390 * @retval 0: DMA mode is not enabled, 1: DMA mode is enabled.
1391 */
LL_ADC_IsDMAModeDSEnabled(const ADC_TypeDef * ADCx)1392 __STATIC_INLINE uint32_t LL_ADC_IsDMAModeDSEnabled(const ADC_TypeDef *ADCx)
1393 {
1394 return ((READ_BIT(ADCx->CONF, ADC_CONF_DMA_DS_ENA) == (ADC_CONF_DMA_DS_ENA)) ? 1UL : 0UL);
1395 }
1396
1397 /**
1398 * @brief Select the ADC conversion rate.
1399 * @rmtoll CONF SAMPLE_RATE LL_ADC_SetSampleRate
1400 * @param ADCx ADC instance
1401 * @param SampleRate This parameter can be one of the following values:
1402 * @arg @ref LL_ADC_SAMPLE_RATE_16
1403 * @arg @ref LL_ADC_SAMPLE_RATE_20
1404 * @arg @ref LL_ADC_SAMPLE_RATE_24
1405 * @arg @ref LL_ADC_SAMPLE_RATE_28
1406 * @arg @ref LL_ADC_SAMPLE_RATE_32 (1)
1407 * @arg @ref LL_ADC_SAMPLE_RATE_36 (1)
1408 * @arg @ref LL_ADC_SAMPLE_RATE_40 (1)
1409 * @arg @ref LL_ADC_SAMPLE_RATE_44 (1)
1410 * @arg @ref LL_ADC_SAMPLE_RATE_48 (1)
1411 * @arg @ref LL_ADC_SAMPLE_RATE_52 (1)
1412 * @arg @ref LL_ADC_SAMPLE_RATE_56 (1)
1413 * @arg @ref LL_ADC_SAMPLE_RATE_60 (1)
1414 * @arg @ref LL_ADC_SAMPLE_RATE_64 (1)
1415 * @arg @ref LL_ADC_SAMPLE_RATE_68 (1)
1416 * @arg @ref LL_ADC_SAMPLE_RATE_72 (1)
1417 * @arg @ref LL_ADC_SAMPLE_RATE_76 (1)
1418 * @arg @ref LL_ADC_SAMPLE_RATE_80 (1)
1419 * @arg @ref LL_ADC_SAMPLE_RATE_84 (1)
1420 * @arg @ref LL_ADC_SAMPLE_RATE_88 (1)
1421 * @arg @ref LL_ADC_SAMPLE_RATE_92 (1)
1422 * @arg @ref LL_ADC_SAMPLE_RATE_96 (1)
1423 * @arg @ref LL_ADC_SAMPLE_RATE_100 (1)
1424 * @arg @ref LL_ADC_SAMPLE_RATE_104 (1)
1425 * @arg @ref LL_ADC_SAMPLE_RATE_108 (1)
1426 * @arg @ref LL_ADC_SAMPLE_RATE_112 (1)
1427 * @arg @ref LL_ADC_SAMPLE_RATE_116 (1)
1428 * @arg @ref LL_ADC_SAMPLE_RATE_120 (1)
1429 * @arg @ref LL_ADC_SAMPLE_RATE_124 (1)
1430 * @arg @ref LL_ADC_SAMPLE_RATE_128 (1)
1431 * @arg @ref LL_ADC_SAMPLE_RATE_132 (1)
1432 * @arg @ref LL_ADC_SAMPLE_RATE_136 (1)
1433 * @arg @ref LL_ADC_SAMPLE_RATE_140 (1)
1434 *
1435 * (1) Parameter only available on STM32WB09 and STM32WB05
1436 * @retval None
1437 */
LL_ADC_SetSampleRate(ADC_TypeDef * ADCx,uint32_t SampleRate)1438 __STATIC_INLINE void LL_ADC_SetSampleRate(ADC_TypeDef *ADCx, uint32_t SampleRate)
1439 {
1440 #if defined(ADC_CONF_SAMPLE_RATE_MSB)
1441 MODIFY_REG(ADCx->CONF, ADC_CONF_SAMPLE_RATE | ADC_CONF_SAMPLE_RATE_MSB, SampleRate);
1442 #else
1443 MODIFY_REG(ADCx->CONF, ADC_CONF_SAMPLE_RATE, SampleRate);
1444 #endif /* ADC_CONF_SAMPLE_RATE_MSB */
1445 }
1446
1447
1448 /**
1449 * @brief Get the ADC conversion rate.
1450 * @rmtoll CONF SAMPLE_RATE LL_ADC_GetSampleRate
1451 * @param ADCx ADC instance
1452 * @retval Returned value can be one of the following values:
1453 * @arg @ref LL_ADC_SAMPLE_RATE_16
1454 * @arg @ref LL_ADC_SAMPLE_RATE_20
1455 * @arg @ref LL_ADC_SAMPLE_RATE_24
1456 * @arg @ref LL_ADC_SAMPLE_RATE_28
1457 * @arg @ref LL_ADC_SAMPLE_RATE_32 (1)
1458 * @arg @ref LL_ADC_SAMPLE_RATE_36 (1)
1459 * @arg @ref LL_ADC_SAMPLE_RATE_40 (1)
1460 * @arg @ref LL_ADC_SAMPLE_RATE_44 (1)
1461 * @arg @ref LL_ADC_SAMPLE_RATE_48 (1)
1462 * @arg @ref LL_ADC_SAMPLE_RATE_52 (1)
1463 * @arg @ref LL_ADC_SAMPLE_RATE_56 (1)
1464 * @arg @ref LL_ADC_SAMPLE_RATE_60 (1)
1465 * @arg @ref LL_ADC_SAMPLE_RATE_64 (1)
1466 * @arg @ref LL_ADC_SAMPLE_RATE_68 (1)
1467 * @arg @ref LL_ADC_SAMPLE_RATE_72 (1)
1468 * @arg @ref LL_ADC_SAMPLE_RATE_76 (1)
1469 * @arg @ref LL_ADC_SAMPLE_RATE_80 (1)
1470 * @arg @ref LL_ADC_SAMPLE_RATE_84 (1)
1471 * @arg @ref LL_ADC_SAMPLE_RATE_88 (1)
1472 * @arg @ref LL_ADC_SAMPLE_RATE_92 (1)
1473 * @arg @ref LL_ADC_SAMPLE_RATE_96 (1)
1474 * @arg @ref LL_ADC_SAMPLE_RATE_100 (1)
1475 * @arg @ref LL_ADC_SAMPLE_RATE_104 (1)
1476 * @arg @ref LL_ADC_SAMPLE_RATE_108 (1)
1477 * @arg @ref LL_ADC_SAMPLE_RATE_112 (1)
1478 * @arg @ref LL_ADC_SAMPLE_RATE_116 (1)
1479 * @arg @ref LL_ADC_SAMPLE_RATE_120 (1)
1480 * @arg @ref LL_ADC_SAMPLE_RATE_124 (1)
1481 * @arg @ref LL_ADC_SAMPLE_RATE_128 (1)
1482 * @arg @ref LL_ADC_SAMPLE_RATE_132 (1)
1483 * @arg @ref LL_ADC_SAMPLE_RATE_136 (1)
1484 * @arg @ref LL_ADC_SAMPLE_RATE_140 (1)
1485 *
1486 * (1) Parameter only available on STM32WB09 and STM32WB05
1487 */
LL_ADC_GetSampleRate(const ADC_TypeDef * ADCx)1488 __STATIC_INLINE uint32_t LL_ADC_GetSampleRate(const ADC_TypeDef *ADCx)
1489 {
1490 #if defined(ADC_CONF_SAMPLE_RATE_MSB)
1491 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_SAMPLE_RATE | ADC_CONF_SAMPLE_RATE_MSB));
1492 #else
1493 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_SAMPLE_RATE));
1494 #endif /* ADC_CONF_SAMPLE_RATE_MSB */
1495 }
1496
1497 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
1498 /**
1499 * @brief Select the ADC operation mode.
1500 * @rmtoll CONF OP_MODE LL_ADC_SetADCMode
1501 * @param ADCx ADC instance
1502 * @param OperationMode This parameter can be one of the following values:
1503 * @arg @ref LL_ADC_OP_MODE_AUDIO
1504 * @arg @ref LL_ADC_OP_MODE_ADC
1505 * @arg @ref LL_ADC_OP_MODE_FULL
1506 * @retval None
1507 */
LL_ADC_SetADCMode(ADC_TypeDef * ADCx,uint32_t OperationMode)1508 __STATIC_INLINE void LL_ADC_SetADCMode(ADC_TypeDef *ADCx, uint32_t OperationMode)
1509 {
1510 MODIFY_REG(ADCx->CONF, ADC_CONF_OP_MODE, OperationMode);
1511 }
1512
1513
1514 /**
1515 * @brief Get the ADC operation mode.
1516 * @rmtoll CONF OP_MODE LL_ADC_GetADCMode
1517 * @param ADCx ADC instance
1518 * @retval Returned value can be one of the following values:
1519 * @arg @ref LL_ADC_OP_MODE_AUDIO
1520 * @arg @ref LL_ADC_OP_MODE_ADC
1521 * @arg @ref LL_ADC_OP_MODE_FULL
1522 */
LL_ADC_GetADCMode(const ADC_TypeDef * ADCx)1523 __STATIC_INLINE uint32_t LL_ADC_GetADCMode(const ADC_TypeDef *ADCx)
1524 {
1525 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_OP_MODE));
1526 }
1527 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
1528
1529 /**
1530 * @brief Enable the synchronization of the ADC start conversion with
1531 * a pulse generated by the SMPS.
1532 * @note This bitfield must be 0 when the ADC clock is 32 MHz or
1533 * when the SMPS is not used.
1534 * @rmtoll CONF SMPS_SYNCHRO_ENA LL_ADC_SMPSSyncEnable
1535 * @param ADCx ADC instance
1536 * @retval None
1537 */
LL_ADC_SMPSSyncEnable(ADC_TypeDef * ADCx)1538 __STATIC_INLINE void LL_ADC_SMPSSyncEnable(ADC_TypeDef *ADCx)
1539 {
1540 SET_BIT(ADCx->CONF, ADC_CONF_SMPS_SYNCHRO_ENA);
1541 }
1542
1543 /**
1544 * @brief Disable the synchronization of the ADC start conversion with
1545 * a pulse generated by the SMPS.
1546 * @note This bitfield must be 0 when the ADC clock is 32 MHz or
1547 * when the SMPS is not used.
1548 * @rmtoll CONF SMPS_SYNCHRO_ENA LL_ADC_SMPSSyncDisable
1549 * @param ADCx ADC instance
1550 * @retval None
1551 */
LL_ADC_SMPSSyncDisable(ADC_TypeDef * ADCx)1552 __STATIC_INLINE void LL_ADC_SMPSSyncDisable(ADC_TypeDef *ADCx)
1553 {
1554 CLEAR_BIT(ADCx->CONF, ADC_CONF_SMPS_SYNCHRO_ENA);
1555 }
1556
1557
1558 /**
1559 * @brief Check if the the synchronization of the ADC start conversion with
1560 * a pulse generated by the SMPS is enabled.
1561 * @note This bitfield must be 0 when the ADC clock is 32 MHz or
1562 * when the SMPS is not used.
1563 * @rmtoll CONF SMPS_SYNCHRO_ENA LL_ADC_IsSMPSSyncEnabled
1564 * @param ADCx ADC instance
1565 * @retval 0: Synchronization with SMPS is not enabled, 1: Synchronization with SMPS is enabled.
1566 */
LL_ADC_IsSMPSSyncEnabled(const ADC_TypeDef * ADCx)1567 __STATIC_INLINE uint32_t LL_ADC_IsSMPSSyncEnabled(const ADC_TypeDef *ADCx)
1568 {
1569 return ((READ_BIT(ADCx->CONF, ADC_CONF_SMPS_SYNCHRO_ENA) == (ADC_CONF_SMPS_SYNCHRO_ENA)) ? 1UL : 0UL);
1570 }
1571
1572
1573 /**
1574 * @brief Set the number of conversion in a sequence starting from SEQ0.
1575 * @rmtoll CONF SEQ_LEN LL_ADC_SetSequenceLength
1576 * @param ADCx ADC instance
1577 * @param SequenceLength This parameter must be a number between Min_Data = 1 and Max_Data = 16.
1578 * @retval None
1579 */
LL_ADC_SetSequenceLength(ADC_TypeDef * ADCx,uint32_t SequenceLength)1580 __STATIC_INLINE void LL_ADC_SetSequenceLength(ADC_TypeDef *ADCx, uint32_t SequenceLength)
1581 {
1582 MODIFY_REG(ADCx->CONF, ADC_CONF_SEQ_LEN, (SequenceLength - 1UL) << ADC_CONF_SEQ_LEN_Pos);
1583 }
1584
1585
1586 /**
1587 * @brief Get the number of conversion in a sequence starting from SEQ0.
1588 * @rmtoll CONF SEQ_LEN LL_ADC_GetSequenceLength
1589 * @param ADCx ADC instance
1590 * @retval Returned value is a number between Min_Data = 1 and Max_Data = 16.
1591 */
LL_ADC_GetSequenceLength(const ADC_TypeDef * ADCx)1592 __STATIC_INLINE uint32_t LL_ADC_GetSequenceLength(const ADC_TypeDef *ADCx)
1593 {
1594 return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_SEQ_LEN) >> ADC_CONF_SEQ_LEN_Pos) + 1UL;
1595 }
1596
1597
1598 /**
1599 * @brief Enable the ADC conversion in sequence mode.
1600 * @rmtoll CONF SEQUENCE LL_ADC_SequenceModeEnable
1601 * @param ADCx ADC instance
1602 * @retval None
1603 */
LL_ADC_SequenceModeEnable(ADC_TypeDef * ADCx)1604 __STATIC_INLINE void LL_ADC_SequenceModeEnable(ADC_TypeDef *ADCx)
1605 {
1606 SET_BIT(ADCx->CONF, ADC_CONF_SEQUENCE);
1607 }
1608
1609
1610 /**
1611 * @brief Disable the ADC conversion in sequence mode.
1612 * @rmtoll CONF SEQUENCE LL_ADC_SequenceModeDisable
1613 * @param ADCx ADC instance
1614 * @retval None
1615 */
LL_ADC_SequenceModeDisable(ADC_TypeDef * ADCx)1616 __STATIC_INLINE void LL_ADC_SequenceModeDisable(ADC_TypeDef *ADCx)
1617 {
1618 CLEAR_BIT(ADCx->CONF, ADC_CONF_SEQUENCE);
1619 }
1620
1621
1622 /**
1623 * @brief Check if the ADC conversion in sequence mode is enabled.
1624 * @rmtoll CONF SEQUENCE LL_ADC_IsSequenceModeEnabled
1625 * @param ADCx ADC instance
1626 * @retval 0: Sequence mode is not enabled, 1: Sequence mode is enabled.
1627 */
LL_ADC_IsSequenceModeEnabled(const ADC_TypeDef * ADCx)1628 __STATIC_INLINE uint32_t LL_ADC_IsSequenceModeEnabled(const ADC_TypeDef *ADCx)
1629 {
1630 return ((READ_BIT(ADCx->CONF, ADC_CONF_SEQUENCE) == (ADC_CONF_SEQUENCE)) ? 1UL : 0UL);
1631 }
1632
1633
1634 /**
1635 * @brief Enable the ADC continuous conversion mode.
1636 * When a sequence is over, the conversion starts again.
1637 * @note Stop the conversion can be made by sets the STOP_OP_MODE bit.
1638 * Call the API @ref LL_ADC_StopConversion().
1639 * @rmtoll CONF CONT LL_ADC_ContinuousModeEnable
1640 * @param ADCx ADC instance
1641 * @retval None
1642 */
LL_ADC_ContinuousModeEnable(ADC_TypeDef * ADCx)1643 __STATIC_INLINE void LL_ADC_ContinuousModeEnable(ADC_TypeDef *ADCx)
1644 {
1645 SET_BIT(ADCx->CONF, ADC_CONF_CONT);
1646 }
1647
1648
1649 /**
1650 * @brief Disable the ADC continuous conversion mode.
1651 * When a sequence is over, the conversion stops (single conversion mode).
1652 * @rmtoll CONF CONT LL_ADC_ContinuousModeDisable
1653 * @param ADCx ADC instance
1654 * @retval None
1655 */
LL_ADC_ContinuousModeDisable(ADC_TypeDef * ADCx)1656 __STATIC_INLINE void LL_ADC_ContinuousModeDisable(ADC_TypeDef *ADCx)
1657 {
1658 CLEAR_BIT(ADCx->CONF, ADC_CONF_CONT);
1659 }
1660
1661
1662 /**
1663 * @brief Check if the ADC continuous conversion mode is enabled.
1664 * @rmtoll CONF CONT LL_ADC_IsContinuousModeEnabled
1665 * @param ADCx ADC instance
1666 * @retval 0: Continuous mode is not enabled, 1: Continuous mode is enabled.
1667 */
LL_ADC_IsContinuousModeEnabled(const ADC_TypeDef * ADCx)1668 __STATIC_INLINE uint32_t LL_ADC_IsContinuousModeEnabled(const ADC_TypeDef *ADCx)
1669 {
1670 return ((READ_BIT(ADCx->CONF, ADC_CONF_CONT) == (ADC_CONF_CONT)) ? 1UL : 0UL);
1671 }
1672
1673 /**
1674 * @}
1675 */
1676
1677
1678 /** @defgroup ADC_LL_EF_Control_ADC ADC Control functions
1679 * @{
1680 */
1681
1682 #if defined(ADC_CTRL_ADC_LDO_ENA)
1683 /**
1684 * @brief Enable the LDO associated to the ADC block.
1685 * @note This bit must not be set on QFN32 package.
1686 * @rmtoll CTRL ADC_LDO_ENA LL_ADC_EnableInternalRegulator
1687 * @param ADCx ADC instance
1688 * @retval None
1689 */
LL_ADC_EnableInternalRegulator(ADC_TypeDef * ADCx)1690 __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
1691 {
1692 SET_BIT(ADCx->CTRL, ADC_CTRL_ADC_LDO_ENA);
1693 }
1694
1695
1696 /**
1697 * @brief Disable the LDO associated to the ADC block.
1698 * @note This bit must not be set on QFN32 package.
1699 * @rmtoll CTRL ADC_LDO_ENA LL_ADC_DisableInternalRegulator
1700 * @param ADCx ADC instance
1701 * @retval None
1702 */
LL_ADC_DisableInternalRegulator(ADC_TypeDef * ADCx)1703 __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
1704 {
1705 CLEAR_BIT(ADCx->CTRL, ADC_CTRL_ADC_LDO_ENA);
1706 }
1707
1708
1709 /**
1710 * @brief Check if the LDO associated to the ADC block is enabled.
1711 * @note This bit must not be set on QFN32 package.
1712 * @rmtoll CTRL ADC_LDO_ENA LL_ADC_IsInternalRegulatorEnabled
1713 * @param ADCx ADC instance
1714 * @retval 0: LDO is not enabled, 1: LDO is enabled.
1715 */
LL_ADC_IsInternalRegulatorEnabled(const ADC_TypeDef * ADCx)1716 __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(const ADC_TypeDef *ADCx)
1717 {
1718 return ((READ_BIT(ADCx->CTRL, ADC_CTRL_ADC_LDO_ENA) == (ADC_CTRL_ADC_LDO_ENA)) ? 1UL : 0UL);
1719 }
1720 #endif /* ADC_CTRL_ADC_LDO_ENA */
1721
1722 #if defined(ADC_CTRL_DIG_AUD_MODE)
1723 /**
1724 * @brief Enable the digital audio mode.
1725 * @rmtoll CTRL DIG_AUD_MODE LL_ADC_AudioModeEnable
1726 * @param ADCx ADC instance
1727 * @retval None
1728 */
LL_ADC_AudioModeEnable(ADC_TypeDef * ADCx)1729 __STATIC_INLINE void LL_ADC_AudioModeEnable(ADC_TypeDef *ADCx)
1730 {
1731 SET_BIT(ADCx->CTRL, ADC_CTRL_DIG_AUD_MODE);
1732 }
1733
1734
1735 /**
1736 * @brief Disable the digital audio mode.
1737 * @rmtoll CTRL DIG_AUD_MODE LL_ADC_AudioModeDisable
1738 * @param ADCx ADC instance
1739 * @retval None
1740 */
LL_ADC_AudioModeDisable(ADC_TypeDef * ADCx)1741 __STATIC_INLINE void LL_ADC_AudioModeDisable(ADC_TypeDef *ADCx)
1742 {
1743 CLEAR_BIT(ADCx->CTRL, ADC_CTRL_DIG_AUD_MODE);
1744 }
1745
1746 /**
1747 * @brief Check if the digital audio mode is enabled.
1748 * @rmtoll CTRL DIG_AUD_MODE LL_ADC_IsAudioModeEnabled
1749 * @param ADCx ADC instance
1750 * @retval 0: audio mode is not enabled, 1: audio mode is enabled.
1751 */
LL_ADC_IsAudioModeEnabled(const ADC_TypeDef * ADCx)1752 __STATIC_INLINE uint32_t LL_ADC_IsAudioModeEnabled(const ADC_TypeDef *ADCx)
1753 {
1754 return ((READ_BIT(ADCx->CTRL, ADC_CTRL_DIG_AUD_MODE) == (ADC_CTRL_DIG_AUD_MODE)) ? 1UL : 0UL);
1755 }
1756 #endif /* ADC_CTRL_DIG_AUD_MODE */
1757
1758 /**
1759 * @brief Stop the ongoing ADC conversion.
1760 * @note This bit is set by software and cleared by hardware.
1761 * @note When the STOP_MODE_OP is set, the user has to wait around 10 us before
1762 * to start a new ADC conversion (set START_CONV bit).
1763 * @rmtoll CTRL STOP_OP_MODE LL_ADC_StopConversion
1764 * @param ADCx ADC instance
1765 * @retval None
1766 */
LL_ADC_StopConversion(ADC_TypeDef * ADCx)1767 __STATIC_INLINE void LL_ADC_StopConversion(ADC_TypeDef *ADCx)
1768 {
1769 SET_BIT(ADCx->CTRL, ADC_CTRL_STOP_OP_MODE);
1770 }
1771
1772
1773 /**
1774 * @brief Check if the stop conversion is ongoing.
1775 * @rmtoll CTRL STOP_OP_MODE LL_ADC_IsStopConversionOngoing
1776 * @param ADCx ADC instance
1777 * @retval 0: stop conversion is not ongoing, 1: stop conversion is ongoing.
1778 */
LL_ADC_IsStopConversionOngoing(const ADC_TypeDef * ADCx)1779 __STATIC_INLINE uint32_t LL_ADC_IsStopConversionOngoing(const ADC_TypeDef *ADCx)
1780 {
1781 return ((READ_BIT(ADCx->CTRL, ADC_CTRL_STOP_OP_MODE) == (ADC_CTRL_STOP_OP_MODE)) ? 1UL : 0UL);
1782 }
1783
1784
1785 /**
1786 * @brief Start an ADC conversion.
1787 * @note This bit is set by software and cleared by hardware.
1788 * @rmtoll CTRL START_CONV LL_ADC_StartConversion
1789 * @param ADCx ADC instance
1790 * @retval None
1791 */
LL_ADC_StartConversion(ADC_TypeDef * ADCx)1792 __STATIC_INLINE void LL_ADC_StartConversion(ADC_TypeDef *ADCx)
1793 {
1794 SET_BIT(ADCx->CTRL, ADC_CTRL_START_CONV);
1795 }
1796
1797
1798 /**
1799 * @brief Check if the ADC conversion is ongoing.
1800 * @rmtoll CTRL ADC_ON_OFF LL_ADC_IsConversionOngoing
1801 * @param ADCx ADC instance
1802 * @retval 0: ADC conversion is not ongoing, 1: ADC conversion is ongoing.
1803 */
LL_ADC_IsConversionOngoing(const ADC_TypeDef * ADCx)1804 __STATIC_INLINE uint32_t LL_ADC_IsConversionOngoing(const ADC_TypeDef *ADCx)
1805 {
1806 return ((READ_BIT(ADCx->CTRL, ADC_CTRL_ADC_ON_OFF) == (ADC_CTRL_ADC_ON_OFF)) ? 1UL : 0UL);
1807 }
1808
1809
1810 /**
1811 * @brief Power on the ADC.
1812 * @rmtoll CTRL ADC_ON_OFF LL_ADC_Enable
1813 * @param ADCx ADC instance
1814 * @retval None
1815 */
LL_ADC_Enable(ADC_TypeDef * ADCx)1816 __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
1817 {
1818 SET_BIT(ADCx->CTRL, ADC_CTRL_ADC_ON_OFF);
1819 }
1820
1821
1822 /**
1823 * @brief Power off the ADC.
1824 * @rmtoll CTRL ADC_ON_OFF LL_ADC_Disable
1825 * @param ADCx ADC instance
1826 * @retval None
1827 */
LL_ADC_Disable(ADC_TypeDef * ADCx)1828 __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
1829 {
1830 CLEAR_BIT(ADCx->CTRL, ADC_CTRL_ADC_ON_OFF);
1831 }
1832
1833
1834 /**
1835 * @brief Check if the ADC is on.
1836 * @rmtoll CTRL ADC_ON_OFF LL_ADC_IsEnabled
1837 * @param ADCx ADC instance
1838 * @retval 0: ADC is off, 1: ADC is on.
1839 */
LL_ADC_IsEnabled(const ADC_TypeDef * ADCx)1840 __STATIC_INLINE uint32_t LL_ADC_IsEnabled(const ADC_TypeDef *ADCx)
1841 {
1842 return ((READ_BIT(ADCx->CTRL, ADC_CTRL_ADC_ON_OFF) == (ADC_CTRL_ADC_ON_OFF)) ? 1UL : 0UL);
1843 }
1844
1845
1846 /**
1847 * @}
1848 */
1849
1850
1851 /** @defgroup ADC_LL_EF_Occasional_Mode ADC Occasional Mode Control functions
1852 * @{
1853 */
1854
1855 #if defined(ADC_OCM_CTRL_OCM_ENA)
1856 /**
1857 * @brief Start an ADC occasional conversion during an analog audio conversion or
1858 * during an ADC full mode.
1859 * @note This bit is set by software and cleared by hardware.
1860 * @rmtoll OCM_CTRL OCM_ENA LL_ADC_StartOccasionalConversionMode
1861 * @param ADCx ADC instance
1862 * @retval None
1863 */
LL_ADC_StartOccasionalConversionMode(ADC_TypeDef * ADCx)1864 __STATIC_INLINE void LL_ADC_StartOccasionalConversionMode(ADC_TypeDef *ADCx)
1865 {
1866 SET_BIT(ADCx->OCM_CTRL, ADC_OCM_CTRL_OCM_ENA);
1867 }
1868
1869
1870 /**
1871 * @brief Check if the ADC occasional conversion is ongoing.
1872 * @rmtoll OCM_CTRL OCM_ENA LL_ADC_IsOccasionalConversionModeOngoing
1873 * @param ADCx ADC instance
1874 * @retval 0: ADC occasional conversion is not ongoing, 1: ADC occasional conversion is ongoing.
1875 */
LL_ADC_IsOccasionalConversionModeOngoing(const ADC_TypeDef * ADCx)1876 __STATIC_INLINE uint32_t LL_ADC_IsOccasionalConversionModeOngoing(const ADC_TypeDef *ADCx)
1877 {
1878 return ((READ_BIT(ADCx->OCM_CTRL, ADC_OCM_CTRL_OCM_ENA) == (ADC_OCM_CTRL_OCM_ENA)) ? 1UL : 0UL);
1879 }
1880 #endif
1881
1882 #if defined(ADC_OCM_CTRL_OCM_SRC)
1883 /**
1884 * @brief Set the ADC occasional conversion source.
1885 * ADC conversion from internal VBAT.
1886 * ADC conversion from temperature sensor.
1887 * @rmtoll OCM_CTRL OCM_SRC LL_ADC_SetOccasionalConversionSource
1888 * @param ADCx ADC instance
1889 * @param Source This parameter can be one of the following values:
1890 * @arg @ref LL_ADC_OCM_SRC_VBAT
1891 * @arg @ref LL_ADC_OCM_SRC_TEMP
1892 * @retval None
1893 */
LL_ADC_SetOccasionalConversionSource(ADC_TypeDef * ADCx,uint32_t Source)1894 __STATIC_INLINE void LL_ADC_SetOccasionalConversionSource(ADC_TypeDef *ADCx, uint32_t Source)
1895 {
1896 MODIFY_REG(ADCx->OCM_CTRL, ADC_OCM_CTRL_OCM_SRC, Source);
1897 }
1898
1899
1900 /**
1901 * @brief Get the ADC occasional conversion source.
1902 * ADC conversion from internal VBAT.
1903 * ADC conversion from temperature sensor.
1904 * @rmtoll OCM_CTRL OCM_SRC LL_ADC_GetOccasionalConversionSource
1905 * @param ADCx ADC instance
1906 * @retval Returned value can be one of the following values:
1907 * @arg @ref LL_ADC_OCM_SRC_VBAT
1908 * @arg @ref LL_ADC_OCM_SRC_TEMP
1909 */
LL_ADC_GetOccasionalConversionSource(const ADC_TypeDef * ADCx)1910 __STATIC_INLINE uint32_t LL_ADC_GetOccasionalConversionSource(const ADC_TypeDef *ADCx)
1911 {
1912 return (uint32_t)(READ_BIT(ADCx->OCM_CTRL, ADC_OCM_CTRL_OCM_SRC));
1913 }
1914 #endif /* ADC_OCM_CTRL_OCM_SRC */
1915
1916 /**
1917 * @}
1918 */
1919
1920
1921 /** @defgroup ADC_LL_EF_PGA_Configuration ADC PGA Configuration functions
1922 * @{
1923 */
1924
1925 #if defined(ADC_PGA_CONF_PGA_BIAS) && defined(ADC_PGA_CONF_PGA_GAIN)
1926 /**
1927 * @brief Configure the voltage bias and the gain for the PGA used in the ADC microphone mode.
1928 * @param ADCx ADC instance
1929 * @param Bias This parameter can be one of the following values:
1930 * @arg @ref LL_ADC_PGA_BIAS_050_BAT
1931 * @arg @ref LL_ADC_PGA_BIAS_055_BAT
1932 * @arg @ref LL_ADC_PGA_BIAS_060_BAT
1933 * @arg @ref LL_ADC_PGA_BIAS_065_BAT
1934 * @arg @ref LL_ADC_PGA_BIAS_070_BAT
1935 * @arg @ref LL_ADC_PGA_BIAS_075_BAT
1936 * @arg @ref LL_ADC_PGA_BIAS_080_BAT
1937 * @arg @ref LL_ADC_PGA_BIAS_090_BAT
1938 * @param Gain This parameter can be one of the following values:
1939 * @arg @ref LL_ADC_PGA_GAIN_06_DB
1940 * @arg @ref LL_ADC_PGA_GAIN_09_DB
1941 * @arg @ref LL_ADC_PGA_GAIN_12_DB
1942 * @arg @ref LL_ADC_PGA_GAIN_15_DB
1943 * @arg @ref LL_ADC_PGA_GAIN_18_DB
1944 * @arg @ref LL_ADC_PGA_GAIN_21_DB
1945 * @arg @ref LL_ADC_PGA_GAIN_24_DB
1946 * @arg @ref LL_ADC_PGA_GAIN_27_DB
1947 * @arg @ref LL_ADC_PGA_GAIN_30_DB
1948 * @retval None
1949 */
LL_ADC_ConfigureMicrophonePGA(ADC_TypeDef * ADCx,uint32_t Bias,uint32_t Gain)1950 __STATIC_INLINE void LL_ADC_ConfigureMicrophonePGA(ADC_TypeDef *ADCx, uint32_t Bias, uint32_t Gain)
1951 {
1952 MODIFY_REG(ADCx->PGA_CONF, (ADC_PGA_CONF_PGA_BIAS | ADC_PGA_CONF_PGA_GAIN), (Bias | Gain));
1953 }
1954
1955
1956 /**
1957 * @brief Set the voltage bias for the PGA used in the ADC microphone mode.
1958 * @rmtoll PGA_CONF PGA_BIAS LL_ADC_SetMicrophonePGABias
1959 * @param ADCx ADC instance
1960 * @param Bias This parameter can be one of the following values:
1961 * @arg @ref LL_ADC_PGA_BIAS_050_BAT
1962 * @arg @ref LL_ADC_PGA_BIAS_055_BAT
1963 * @arg @ref LL_ADC_PGA_BIAS_060_BAT
1964 * @arg @ref LL_ADC_PGA_BIAS_065_BAT
1965 * @arg @ref LL_ADC_PGA_BIAS_070_BAT
1966 * @arg @ref LL_ADC_PGA_BIAS_075_BAT
1967 * @arg @ref LL_ADC_PGA_BIAS_080_BAT
1968 * @arg @ref LL_ADC_PGA_BIAS_090_BAT
1969 * @retval None
1970 */
LL_ADC_SetMicrophonePGABias(ADC_TypeDef * ADCx,uint32_t Bias)1971 __STATIC_INLINE void LL_ADC_SetMicrophonePGABias(ADC_TypeDef *ADCx, uint32_t Bias)
1972 {
1973 MODIFY_REG(ADCx->PGA_CONF, ADC_PGA_CONF_PGA_BIAS, Bias);
1974 }
1975
1976
1977 /**
1978 * @brief Get the voltage bias for the PGA used in the ADC microphone mode.
1979 * @rmtoll PGA_CONF PGA_BIAS LL_ADC_GetMicrophonePGABias
1980 * @param ADCx ADC instance
1981 * @retval Returned value can be one of the following values:
1982 * @arg @ref LL_ADC_PGA_BIAS_050_BAT
1983 * @arg @ref LL_ADC_PGA_BIAS_055_BAT
1984 * @arg @ref LL_ADC_PGA_BIAS_060_BAT
1985 * @arg @ref LL_ADC_PGA_BIAS_065_BAT
1986 * @arg @ref LL_ADC_PGA_BIAS_070_BAT
1987 * @arg @ref LL_ADC_PGA_BIAS_075_BAT
1988 * @arg @ref LL_ADC_PGA_BIAS_080_BAT
1989 * @arg @ref LL_ADC_PGA_BIAS_090_BAT
1990 */
LL_ADC_GetMicrophonePGABias(const ADC_TypeDef * ADCx)1991 __STATIC_INLINE uint32_t LL_ADC_GetMicrophonePGABias(const ADC_TypeDef *ADCx)
1992 {
1993 return (uint32_t)(READ_BIT(ADCx->PGA_CONF, ADC_PGA_CONF_PGA_BIAS));
1994 }
1995
1996 /**
1997 * @brief Set the gain for the PGA used in the ADC microphone mode.
1998 * @note PGA gain of 6 dB is equivalent to the 2.4 V ADC full scale.
1999 * @rmtoll PGA_CONF PGA_GAIN LL_ADC_SetMicrophonePGAGain
2000 * @param ADCx ADC instance
2001 * @param Gain This parameter can be one of the following values:
2002 * @arg @ref LL_ADC_PGA_GAIN_06_DB
2003 * @arg @ref LL_ADC_PGA_GAIN_09_DB
2004 * @arg @ref LL_ADC_PGA_GAIN_12_DB
2005 * @arg @ref LL_ADC_PGA_GAIN_15_DB
2006 * @arg @ref LL_ADC_PGA_GAIN_18_DB
2007 * @arg @ref LL_ADC_PGA_GAIN_21_DB
2008 * @arg @ref LL_ADC_PGA_GAIN_24_DB
2009 * @arg @ref LL_ADC_PGA_GAIN_27_DB
2010 * @arg @ref LL_ADC_PGA_GAIN_30_DB
2011 * @retval None
2012 */
LL_ADC_SetMicrophonePGAGain(ADC_TypeDef * ADCx,uint32_t Gain)2013 __STATIC_INLINE void LL_ADC_SetMicrophonePGAGain(ADC_TypeDef *ADCx, uint32_t Gain)
2014 {
2015 MODIFY_REG(ADCx->PGA_CONF, ADC_PGA_CONF_PGA_GAIN, Gain);
2016 }
2017
2018
2019 /**
2020 * @brief Get the gain for the PGA used in the ADC microphone mode.
2021 * @note PGA gain of 6 dB is equivalent to the 2.4 V ADC full scale.
2022 * @rmtoll PGA_CONF PGA_GAIN LL_ADC_GetMicrophonePGAGain
2023 * @param ADCx ADC instance
2024 * @retval Returned value can be one of the following values:
2025 * @arg @ref LL_ADC_PGA_GAIN_06_DB
2026 * @arg @ref LL_ADC_PGA_GAIN_09_DB
2027 * @arg @ref LL_ADC_PGA_GAIN_12_DB
2028 * @arg @ref LL_ADC_PGA_GAIN_15_DB
2029 * @arg @ref LL_ADC_PGA_GAIN_18_DB
2030 * @arg @ref LL_ADC_PGA_GAIN_21_DB
2031 * @arg @ref LL_ADC_PGA_GAIN_24_DB
2032 * @arg @ref LL_ADC_PGA_GAIN_27_DB
2033 * @arg @ref LL_ADC_PGA_GAIN_30_DB
2034 */
LL_ADC_GetMicrophonePGAGain(const ADC_TypeDef * ADCx)2035 __STATIC_INLINE uint32_t LL_ADC_GetMicrophonePGAGain(const ADC_TypeDef *ADCx)
2036 {
2037 return (uint32_t)(READ_BIT(ADCx->PGA_CONF, ADC_PGA_CONF_PGA_GAIN));
2038 }
2039 #endif /* ADC_PGA_CONF_PGA_BIAS && ADC_PGA_CONF_PGA_GAIN */
2040
2041 /**
2042 * @}
2043 */
2044
2045 /** @defgroup ADC_LL_EF_Input_Switch_Selection ADC Input Switch Selection functions
2046 * @{
2047 */
2048
2049 /**
2050 * @brief Set the input voltage range for selected channel.
2051 * @rmtoll SWITCH SE_VIN_0 LL_ADC_SetChannelVoltageRange\n
2052 * SWITCH SE_VIN_1 LL_ADC_SetChannelVoltageRange\n
2053 * SWITCH SE_VIN_2 LL_ADC_SetChannelVoltageRange\n
2054 * SWITCH SE_VIN_3 LL_ADC_SetChannelVoltageRange\n
2055 * SWITCH SE_VIN_4 LL_ADC_SetChannelVoltageRange\n
2056 * SWITCH SE_VIN_5 LL_ADC_SetChannelVoltageRange\n
2057 * SWITCH SE_VIN_6 LL_ADC_SetChannelVoltageRange\n
2058 * SWITCH SE_VIN_7 LL_ADC_SetChannelVoltageRange
2059 * @param ADCx ADC instance
2060 * @param Channel This parameter can be one of the following values:
2061 * @arg @ref LL_ADC_CHANNEL_VINM0
2062 * @arg @ref LL_ADC_CHANNEL_VINM1
2063 * @arg @ref LL_ADC_CHANNEL_VINM2
2064 * @arg @ref LL_ADC_CHANNEL_VINM3
2065 * @arg @ref LL_ADC_CHANNEL_VINP0
2066 * @arg @ref LL_ADC_CHANNEL_VINP1
2067 * @arg @ref LL_ADC_CHANNEL_VINP2
2068 * @arg @ref LL_ADC_CHANNEL_VINP3
2069 * @arg @ref LL_ADC_CHANNEL_VINP0_VINM0
2070 * @arg @ref LL_ADC_CHANNEL_VINP1_VINM1
2071 * @arg @ref LL_ADC_CHANNEL_VINP2_VINM2
2072 * @arg @ref LL_ADC_CHANNEL_VINP3_VINM3
2073 * @arg @ref LL_ADC_CHANNEL_VBAT
2074 * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2075 * @param Range This parameter can be one of the following values:
2076 * @arg @ref LL_ADC_VIN_RANGE_1V2
2077 * @arg @ref LL_ADC_VIN_RANGE_2V4
2078 * @arg @ref LL_ADC_VIN_RANGE_3V6
2079 * @retval None
2080 */
LL_ADC_SetChannelVoltageRange(ADC_TypeDef * ADCx,uint32_t Channel,uint32_t Range)2081 __STATIC_INLINE void LL_ADC_SetChannelVoltageRange(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Range)
2082 {
2083 MODIFY_REG(ADCx->SWITCH, (ADC_SWITCH_SE_VIN_0 << ADC_CHANNEL_SWITCH_POS_LUT[Channel]),
2084 (Range << ADC_CHANNEL_SWITCH_POS_LUT[Channel]));
2085 }
2086
2087 /**
2088 * @brief Get the input voltage range for selected channel.
2089 * @rmtoll SWITCH SE_VIN_0 LL_ADC_GetChannelVoltageRange
2090 * SWITCH SE_VIN_1 LL_ADC_GetChannelVoltageRange\n
2091 * SWITCH SE_VIN_2 LL_ADC_GetChannelVoltageRange\n
2092 * SWITCH SE_VIN_3 LL_ADC_GetChannelVoltageRange\n
2093 * SWITCH SE_VIN_4 LL_ADC_GetChannelVoltageRange\n
2094 * SWITCH SE_VIN_5 LL_ADC_GetChannelVoltageRange\n
2095 * SWITCH SE_VIN_6 LL_ADC_GetChannelVoltageRange\n
2096 * SWITCH SE_VIN_7 LL_ADC_GetChannelVoltageRange
2097 * @param ADCx ADC instance
2098 * @param Channel This parameter can be one of the following values:
2099 * @arg @ref LL_ADC_CHANNEL_VINM0
2100 * @arg @ref LL_ADC_CHANNEL_VINM1
2101 * @arg @ref LL_ADC_CHANNEL_VINM2
2102 * @arg @ref LL_ADC_CHANNEL_VINM3
2103 * @arg @ref LL_ADC_CHANNEL_VINP0
2104 * @arg @ref LL_ADC_CHANNEL_VINP1
2105 * @arg @ref LL_ADC_CHANNEL_VINP2
2106 * @arg @ref LL_ADC_CHANNEL_VINP3
2107 * @arg @ref LL_ADC_CHANNEL_VINP0_VINM0
2108 * @arg @ref LL_ADC_CHANNEL_VINP1_VINM1
2109 * @arg @ref LL_ADC_CHANNEL_VINP2_VINM2
2110 * @arg @ref LL_ADC_CHANNEL_VINP3_VINM3
2111 * @arg @ref LL_ADC_CHANNEL_VBAT
2112 * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2113 * @retval Returned value can be one of the following values:
2114 * @arg @ref LL_ADC_VIN_RANGE_1V2
2115 * @arg @ref LL_ADC_VIN_RANGE_2V4
2116 * @arg @ref LL_ADC_VIN_RANGE_3V6
2117 */
LL_ADC_GetChannelVoltageRange(const ADC_TypeDef * ADCx,uint32_t Channel)2118 __STATIC_INLINE uint32_t LL_ADC_GetChannelVoltageRange(const ADC_TypeDef *ADCx, uint32_t Channel)
2119 {
2120 return ((uint32_t)(READ_BIT(ADCx->SWITCH, ADC_SWITCH_SE_VIN_0 << ADC_CHANNEL_SWITCH_POS_LUT[Channel]))
2121 >> ADC_CHANNEL_SWITCH_POS_LUT[Channel]);
2122 }
2123
2124 /**
2125 * @}
2126 */
2127
2128 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
2129 /** @defgroup ADC_LL_EF_DF_Configuration ADC Decimation Filter Configuration functions
2130 * @{
2131 */
2132
2133 /**
2134 * @brief Set the input dynamic range for Decimation Filter (DF).
2135 * It can be full dynamic or half dynamic.
2136 * @rmtoll DF_CONF DF_HALF_D_EN LL_ADC_SetDFInputDynamic
2137 * @param ADCx ADC instance
2138 * @param Dynamic This parameter can be one of the following values:
2139 * @arg @ref LL_ADC_DF_DYN_RANGE_FULL
2140 * @arg @ref LL_ADC_DF_DYN_RANGE_HALF
2141 * @retval None
2142 */
LL_ADC_SetDFInputDynamic(ADC_TypeDef * ADCx,uint32_t Dynamic)2143 __STATIC_INLINE void LL_ADC_SetDFInputDynamic(ADC_TypeDef *ADCx, uint32_t Dynamic)
2144 {
2145 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_DF_HALF_D_EN, Dynamic);
2146 }
2147
2148
2149 /**
2150 * @brief Get the input dynamic ragne for Decimation Filter (DF).
2151 * It can be full dynamic or half dynamic.
2152 * @rmtoll DF_CONF DF_HALF_D_EN LL_ADC_GetDFInputDynamic
2153 * @param ADCx ADC instance
2154 * @retval Returned value can be one of the following values:
2155 * @arg @ref LL_ADC_DF_DYN_RANGE_FULL
2156 * @arg @ref LL_ADC_DF_DYN_RANGE_HALF
2157 */
LL_ADC_GetDFInputDynamic(const ADC_TypeDef * ADCx)2158 __STATIC_INLINE uint32_t LL_ADC_GetDFInputDynamic(const ADC_TypeDef *ADCx)
2159 {
2160 return (uint32_t)(READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_HALF_D_EN));
2161 }
2162
2163 /**
2164 * @brief Enable the High Pass Filter (HPF) of the Decimation Filter (DF).
2165 * The HPF cut off frequency is 40 Hz.
2166 * @rmtoll DF_CONF DF_HPF_EN LL_ADC_DFHighPassFilterEnable
2167 * @param ADCx ADC instance
2168 * @retval None
2169 */
LL_ADC_DFHighPassFilterEnable(ADC_TypeDef * ADCx)2170 __STATIC_INLINE void LL_ADC_DFHighPassFilterEnable(ADC_TypeDef *ADCx)
2171 {
2172 SET_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_HPF_EN);
2173 }
2174
2175
2176 /**
2177 * @brief Disable the High Pass Filter (HPF) of the Decimation Filter (DF).
2178 * The HPF cut off frequency is 40 Hz.
2179 * @rmtoll DF_CONF DF_HPF_EN LL_ADC_DFHighPassFilterDisable
2180 * @param ADCx ADC instance
2181 * @retval None
2182 */
LL_ADC_DFHighPassFilterDisable(ADC_TypeDef * ADCx)2183 __STATIC_INLINE void LL_ADC_DFHighPassFilterDisable(ADC_TypeDef *ADCx)
2184 {
2185 CLEAR_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_HPF_EN);
2186 }
2187
2188 /**
2189 * @brief Check if the High Pass Filter (HPF) of the Decimation Filter (DF) is enabled.
2190 * @rmtoll DF_CONF DF_HPF_EN LL_ADC_IsDFHighPassFilterEnabled
2191 * @param ADCx ADC instance
2192 * @retval 0: HPF is not enabled, 1: HPF is enabled.
2193 */
LL_ADC_IsDFHighPassFilterEnabled(const ADC_TypeDef * ADCx)2194 __STATIC_INLINE uint32_t LL_ADC_IsDFHighPassFilterEnabled(const ADC_TypeDef *ADCx)
2195 {
2196 return ((READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_HPF_EN) == (ADC_DF_CONF_DF_HPF_EN)) ? 1UL : 0UL);
2197 }
2198
2199 /**
2200 * @brief Select the left/right channel on digital microphone mode.
2201 * @rmtoll DF_CONF DF_MICROL_RN LL_ADC_SetMicrophoneChannel
2202 * @param ADCx ADC instance
2203 * @param Channel This parameter can be one of the following values:
2204 * @arg @ref LL_ADC_DF_MIC_CH_LEFT
2205 * @arg @ref LL_ADC_DF_MIC_CH_RIGHT
2206 * @retval None
2207 */
LL_ADC_SetMicrophoneChannel(ADC_TypeDef * ADCx,uint32_t Channel)2208 __STATIC_INLINE void LL_ADC_SetMicrophoneChannel(ADC_TypeDef *ADCx, uint32_t Channel)
2209 {
2210 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_DF_MICROL_RN, Channel);
2211 }
2212
2213 /**
2214 * @brief Get the left/right channel on digital microphone mode.
2215 * @rmtoll DF_CONF DF_MICROL_RN LL_ADC_GetMicrophoneChannel
2216 * @param ADCx ADC instance
2217 * @retval Returned value can be one of the following values:
2218 * @arg @ref LL_ADC_DF_MIC_CH_LEFT
2219 * @arg @ref LL_ADC_DF_MIC_CH_RIGHT
2220 */
LL_ADC_GetMicrophoneChannel(const ADC_TypeDef * ADCx)2221 __STATIC_INLINE uint32_t LL_ADC_GetMicrophoneChannel(const ADC_TypeDef *ADCx)
2222 {
2223 return (uint32_t)(READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_MICROL_RN));
2224 }
2225
2226 /**
2227 * @brief Set the PDM clock rate.
2228 * The PDM clock rate is : SYSTEM_CLOCK / (Divider).
2229 * @note With a SYSTEM_CLOCK of 32 MHz, the PDM clock rate is:
2230 * 3.2 MHz with Divider = 10.
2231 * 1.28 MHz with Divider = 25.
2232 * @rmtoll DF_CONF PDM_RATE LL_ADC_SetPDMRate
2233 * @param ADCx ADC instance
2234 * @param Divider This parameter can be one of the following values:
2235 * @arg @ref LL_ADC_PDM_DIV_10
2236 * @arg @ref LL_ADC_PDM_DIV_11
2237 * @arg @ref LL_ADC_PDM_DIV_12
2238 * @arg @ref LL_ADC_PDM_DIV_13
2239 * @arg @ref LL_ADC_PDM_DIV_14
2240 * @arg @ref LL_ADC_PDM_DIV_15
2241 * @arg @ref LL_ADC_PDM_DIV_16
2242 * @arg @ref LL_ADC_PDM_DIV_17
2243 * @arg @ref LL_ADC_PDM_DIV_18
2244 * @arg @ref LL_ADC_PDM_DIV_19
2245 * @arg @ref LL_ADC_PDM_DIV_20
2246 * @arg @ref LL_ADC_PDM_DIV_21
2247 * @arg @ref LL_ADC_PDM_DIV_22
2248 * @arg @ref LL_ADC_PDM_DIV_23
2249 * @arg @ref LL_ADC_PDM_DIV_24
2250 * @arg @ref LL_ADC_PDM_DIV_25
2251 * @retval None
2252 */
LL_ADC_SetPDMRate(ADC_TypeDef * ADCx,uint32_t Divider)2253 __STATIC_INLINE void LL_ADC_SetPDMRate(ADC_TypeDef *ADCx, uint32_t Divider)
2254 {
2255 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_PDM_RATE, Divider);
2256 }
2257
2258
2259 /**
2260 * @brief Get the PDM clock rate.
2261 * The PDM clock rate is : SYSTEM_CLOCK / (Divider).
2262 * @note With a SYSTEM_CLOCK of 32 MHz, the PDM clock rate is:
2263 * 3.2 MHz with Divider = 10.
2264 * 1.28 MHz with Divider = 25.
2265 * @rmtoll DF_CONF PDM_RATE LL_ADC_GetPDMRate
2266 * @param ADCx ADC instance
2267 * @retval Returned value can be one of the following values:
2268 * @arg @ref LL_ADC_PDM_DIV_10
2269 * @arg @ref LL_ADC_PDM_DIV_11
2270 * @arg @ref LL_ADC_PDM_DIV_12
2271 * @arg @ref LL_ADC_PDM_DIV_13
2272 * @arg @ref LL_ADC_PDM_DIV_14
2273 * @arg @ref LL_ADC_PDM_DIV_15
2274 * @arg @ref LL_ADC_PDM_DIV_16
2275 * @arg @ref LL_ADC_PDM_DIV_17
2276 * @arg @ref LL_ADC_PDM_DIV_18
2277 * @arg @ref LL_ADC_PDM_DIV_19
2278 * @arg @ref LL_ADC_PDM_DIV_20
2279 * @arg @ref LL_ADC_PDM_DIV_21
2280 * @arg @ref LL_ADC_PDM_DIV_22
2281 * @arg @ref LL_ADC_PDM_DIV_23
2282 * @arg @ref LL_ADC_PDM_DIV_24
2283 * @arg @ref LL_ADC_PDM_DIV_25
2284 */
LL_ADC_GetPDMRate(const ADC_TypeDef * ADCx)2285 __STATIC_INLINE uint32_t LL_ADC_GetPDMRate(const ADC_TypeDef *ADCx)
2286 {
2287 return (uint32_t)(READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_PDM_RATE) + 10UL);
2288 }
2289
2290 /**
2291 * @brief Set the signed/unsigned output data format.
2292 * @rmtoll DF_CONF DF_O_S2U LL_ADC_SetDataOutputFormat
2293 * @param ADCx ADC instance
2294 * @param Format This parameter can be one of the following values:
2295 * @arg @ref LL_ADC_DF_DATA_FORMAT_SIGNED
2296 * @arg @ref LL_ADC_DF_DATA_FORMAT_UNSIGNED
2297 * @retval None
2298 */
LL_ADC_SetDataOutputFormat(ADC_TypeDef * ADCx,uint32_t Format)2299 __STATIC_INLINE void LL_ADC_SetDataOutputFormat(ADC_TypeDef *ADCx, uint32_t Format)
2300 {
2301 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_DF_O_S2U, (Format << ADC_DF_CONF_DF_O_S2U_Pos));
2302 }
2303
2304
2305 /**
2306 * @brief Get the signed/unsigned output data format.
2307 * @rmtoll DF_CONF DF_O_S2U LL_ADC_GetDataOutputFormat
2308 * @param ADCx ADC instance
2309 * @retval Returned value can be one of the following values:
2310 * @arg @ref LL_ADC_DF_DATA_FORMAT_SIGNED
2311 * @arg @ref LL_ADC_DF_DATA_FORMAT_UNSIGNED
2312 */
LL_ADC_GetDataOutputFormat(const ADC_TypeDef * ADCx)2313 __STATIC_INLINE uint32_t LL_ADC_GetDataOutputFormat(const ADC_TypeDef *ADCx)
2314 {
2315 return ((uint32_t)(READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_O_S2U)) >> ADC_DF_CONF_DF_O_S2U_Pos);
2316 }
2317
2318 /**
2319 * @brief Set the signed/unsigned input data format.
2320 * @rmtoll DF_CONF DF_I_S2U LL_ADC_SetDataInputFormat
2321 * @param ADCx ADC instance
2322 * @param Format This parameter can be one of the following values:
2323 * @arg @ref LL_ADC_DF_DATA_FORMAT_SIGNED
2324 * @arg @ref LL_ADC_DF_DATA_FORMAT_UNSIGNED
2325 * @retval None
2326 */
LL_ADC_SetDataInputFormat(ADC_TypeDef * ADCx,uint32_t Format)2327 __STATIC_INLINE void LL_ADC_SetDataInputFormat(ADC_TypeDef *ADCx, uint32_t Format)
2328 {
2329 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_DF_I_U2S, ~((Format) << ADC_DF_CONF_DF_I_U2S_Pos) & ADC_DF_CONF_DF_I_U2S);
2330 }
2331
2332
2333 /**
2334 * @brief Get the signed/unsigned input data format.
2335 * @rmtoll DF_CONF DF_I_S2U LL_ADC_GetDataInputFormat
2336 * @param ADCx ADC instance
2337 * @retval Returned value can be one of the following values:
2338 * @arg @ref LL_ADC_DF_DATA_FORMAT_SIGNED
2339 * @arg @ref LL_ADC_DF_DATA_FORMAT_UNSIGNED
2340 */
LL_ADC_GetDataInputFormat(const ADC_TypeDef * ADCx)2341 __STATIC_INLINE uint32_t LL_ADC_GetDataInputFormat(const ADC_TypeDef *ADCx)
2342 {
2343 return ((uint32_t)((READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_I_U2S)) == ADC_DF_CONF_DF_I_U2S) ?
2344 LL_ADC_DF_DATA_FORMAT_SIGNED : LL_ADC_DF_DATA_FORMAT_UNSIGNED);
2345 }
2346
2347 /**
2348 * @brief Enable the fractional interpolator.
2349 * @note This bit must be set only for the generation of a data rate
2350 * at 200 kps from ADC data at 1 MHz.
2351 * @rmtoll DF_CONF DF_ITP1P2 LL_ADC_FractionalInterpolatorEnable
2352 * @param ADCx ADC instance
2353 * @retval None
2354 */
LL_ADC_FractionalInterpolatorEnable(ADC_TypeDef * ADCx)2355 __STATIC_INLINE void LL_ADC_FractionalInterpolatorEnable(ADC_TypeDef *ADCx)
2356 {
2357 SET_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_ITP1P2);
2358 }
2359
2360
2361 /**
2362 * @brief Disable the fractional interpolator.
2363 * @note This bit must be set only for the generation of a data rate
2364 * at 200 kps from ADC data at 1 MHz.
2365 * @rmtoll DF_CONF DF_ITP1P2 LL_ADC_FractionalInterpolatorDisable
2366 * @param ADCx ADC instance
2367 * @retval None
2368 */
LL_ADC_FractionalInterpolatorDisable(ADC_TypeDef * ADCx)2369 __STATIC_INLINE void LL_ADC_FractionalInterpolatorDisable(ADC_TypeDef *ADCx)
2370 {
2371 CLEAR_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_ITP1P2);
2372 }
2373
2374 /**
2375 * @brief Check if the fractional interpolator is enabled.
2376 * @rmtoll DF_CONF DF_ITP1P2 LL_ADC_IsFractionalInterpolatorEnabled
2377 * @param ADCx ADC instance
2378 * @retval 0: Interpolator is not enabled, 1: Interpolator is enabled.
2379 */
LL_ADC_IsFractionalInterpolatorEnabled(const ADC_TypeDef * ADCx)2380 __STATIC_INLINE uint32_t LL_ADC_IsFractionalInterpolatorEnabled(const ADC_TypeDef *ADCx)
2381 {
2382 return ((READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_ITP1P2) == (ADC_DF_CONF_DF_ITP1P2)) ? 1UL : 0UL);
2383 }
2384
2385 /**
2386 * @brief Set the decimator factor of the CIC filter.
2387 * @note This bit must be set (LL_ADC_DF_CIC_DECIMATOR_FACTOR_HALF)
2388 * only for the generation of a data rate
2389 * at 44.1 kps from ADC data at 1 MHz.
2390 * @rmtoll DF_CONF DF_CIC_DHF LL_ADC_SetCICDecimatorFactor
2391 * @param ADCx ADC instance
2392 * @param Factor This parameter can be one of the following values:
2393 * @arg @ref LL_ADC_DF_CIC_DECIMATOR_FACTOR_HALF
2394 * @arg @ref LL_ADC_DF_CIC_DECIMATOR_FACTOR_INTEGER
2395 * @retval None
2396 */
LL_ADC_SetCICDecimatorFactor(ADC_TypeDef * ADCx,uint32_t Factor)2397 __STATIC_INLINE void LL_ADC_SetCICDecimatorFactor(ADC_TypeDef *ADCx, uint32_t Factor)
2398 {
2399 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_DF_CIC_DHF, Factor);
2400 }
2401
2402
2403 /**
2404 * @brief Get the decimator factor of the CIC filter.
2405 * @rmtoll DF_CONF DF_CIC_DHF LL_ADC_GetCICDecimatorFactor
2406 * @param ADCx ADC instance
2407 * @retval Returned value can be one of the following values:
2408 * @arg @ref LL_ADC_DF_CIC_DECIMATOR_FACTOR_HALF
2409 * @arg @ref LL_ADC_DF_CIC_DECIMATOR_FACTOR_INTEGER
2410 */
LL_ADC_GetCICDecimatorFactor(const ADC_TypeDef * ADCx)2411 __STATIC_INLINE uint32_t LL_ADC_GetCICDecimatorFactor(const ADC_TypeDef *ADCx)
2412 {
2413 return ((uint32_t)(READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_CIC_DHF)));
2414 }
2415
2416 /**
2417 * @brief Set the output frequency for the microphone mode.
2418 * @rmtoll DF_CONF DF_CIC_DEC_FACTOR LL_ADC_SetMicrophoneOutputDatarate
2419 * @note Different parameters for digital microphone and analog microphone.
2420 * @param ADCx ADC instance
2421 * @param Frequency This parameter can be one of the following values:
2422 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_47619_HZ
2423 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_44440_HZ
2424 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_22220_HZ
2425 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_15873_HZ
2426 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_7936_HZ
2427 *
2428 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_ANA_200000_HZ
2429 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_ANA_15873_HZ
2430 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_ANA_7936_HZ
2431 * @retval None
2432 */
LL_ADC_SetMicrophoneOutputDatarate(ADC_TypeDef * ADCx,uint32_t Frequency)2433 __STATIC_INLINE void LL_ADC_SetMicrophoneOutputDatarate(ADC_TypeDef *ADCx, uint32_t Frequency)
2434 {
2435 MODIFY_REG(ADCx->DF_CONF, ADC_DF_CONF_DF_CIC_DEC_FACTOR, Frequency);
2436 }
2437
2438
2439 /**
2440 * @brief Get the output frequency for the microphone mode.
2441 * @rmtoll DF_CONF DF_CIC_DEC_FACTOR LL_ADC_GetMicrophoneOutputDatarate
2442 * @param ADCx ADC instance
2443 * @retval Returned value can be one of the following values:
2444 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_47619_HZ
2445 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_44440_HZ
2446 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_22220_HZ
2447 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_15873_HZ
2448 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_DIG_7936_HZ
2449 *
2450 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_ANA_200000_HZ
2451 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_ANA_15873_HZ
2452 * @arg @ref LL_ADC_OUTPUT_FREQ_MIC_ANA_7936_HZ
2453 */
LL_ADC_GetMicrophoneOutputDatarate(const ADC_TypeDef * ADCx)2454 __STATIC_INLINE uint32_t LL_ADC_GetMicrophoneOutputDatarate(const ADC_TypeDef *ADCx)
2455 {
2456 return (uint32_t)(READ_BIT(ADCx->DF_CONF, ADC_DF_CONF_DF_CIC_DEC_FACTOR));
2457 }
2458 /**
2459 * @}
2460 */
2461 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
2462
2463 /** @defgroup ADC_LL_EF_DS_Configuration ADC Down Sampler Configuration functions
2464 * @{
2465 */
2466
2467 /**
2468 * @brief Configure the width (in bit) and the ratio of the output data from the Down Sampler.
2469 * @param ADCx ADC instance
2470 * @param Width This parameter can be one of the following values:
2471 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT (default)
2472 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
2473 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
2474 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
2475 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
2476 * @param Ratio This parameter can be one of the following values:
2477 * @arg @ref LL_ADC_DS_RATIO_1 (no down sampling, default)
2478 * @arg @ref LL_ADC_DS_RATIO_2
2479 * @arg @ref LL_ADC_DS_RATIO_4
2480 * @arg @ref LL_ADC_DS_RATIO_8
2481 * @arg @ref LL_ADC_DS_RATIO_16
2482 * @arg @ref LL_ADC_DS_RATIO_32
2483 * @arg @ref LL_ADC_DS_RATIO_64
2484 * @arg @ref LL_ADC_DS_RATIO_128
2485 * @retval None
2486 */
LL_ADC_ConfigureDSDataOutput(ADC_TypeDef * ADCx,uint32_t Width,uint32_t Ratio)2487 __STATIC_INLINE void LL_ADC_ConfigureDSDataOutput(ADC_TypeDef *ADCx, uint32_t Width, uint32_t Ratio)
2488 {
2489 MODIFY_REG(ADCx->DS_CONF, (ADC_DS_CONF_DS_WIDTH | ADC_DS_CONF_DS_RATIO),
2490 ((Width << ADC_DS_CONF_DS_WIDTH_Pos) | Ratio));
2491 }
2492
2493 /**
2494 * @brief Set the width (in bit) of the output data from the Down Sampler.
2495 * @rmtoll DS_CONF DS_WIDTH LL_ADC_SetDSDataOutputWidth
2496 * @param ADCx ADC instance
2497 * @param Width This parameter can be one of the following values:
2498 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT (default)
2499 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
2500 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
2501 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
2502 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
2503 * @retval None
2504 */
LL_ADC_SetDSDataOutputWidth(ADC_TypeDef * ADCx,uint32_t Width)2505 __STATIC_INLINE void LL_ADC_SetDSDataOutputWidth(ADC_TypeDef *ADCx, uint32_t Width)
2506 {
2507 MODIFY_REG(ADCx->DS_CONF, ADC_DS_CONF_DS_WIDTH, (Width << ADC_DS_CONF_DS_WIDTH_Pos));
2508 }
2509
2510
2511 /**
2512 * @brief Get the width (in bit) of the output data from the Down Sampler (DS).
2513 * @rmtoll DS_CONF DS_WIDTH LL_ADC_GetDSDataOutputWidth
2514 * @param ADCx ADC instance
2515 * @retval Returned value can be one of the following values:
2516 * @arg @ref LL_ADC_DS_DATA_WIDTH_12_BIT (default)
2517 * @arg @ref LL_ADC_DS_DATA_WIDTH_13_BIT
2518 * @arg @ref LL_ADC_DS_DATA_WIDTH_14_BIT
2519 * @arg @ref LL_ADC_DS_DATA_WIDTH_15_BIT
2520 * @arg @ref LL_ADC_DS_DATA_WIDTH_16_BIT
2521 */
LL_ADC_GetDSDataOutputWidth(const ADC_TypeDef * ADCx)2522 __STATIC_INLINE uint32_t LL_ADC_GetDSDataOutputWidth(const ADC_TypeDef *ADCx)
2523 {
2524 return (uint32_t)(READ_BIT(ADCx->DS_CONF, ADC_DS_CONF_DS_WIDTH) >> ADC_DS_CONF_DS_WIDTH_Pos);
2525 }
2526
2527
2528 /**
2529 * @brief Set the ratio of the Down Sampler (DS).
2530 * @rmtoll DS_CONF DS_RATIO LL_ADC_SetDSDataOutputRatio
2531 * @param ADCx ADC instance
2532 * @param Ratio This parameter can be one of the following values:
2533 * @arg @ref LL_ADC_DS_RATIO_1 (no down sampling, default)
2534 * @arg @ref LL_ADC_DS_RATIO_2
2535 * @arg @ref LL_ADC_DS_RATIO_4
2536 * @arg @ref LL_ADC_DS_RATIO_8
2537 * @arg @ref LL_ADC_DS_RATIO_16
2538 * @arg @ref LL_ADC_DS_RATIO_32
2539 * @arg @ref LL_ADC_DS_RATIO_64
2540 * @arg @ref LL_ADC_DS_RATIO_128
2541 * @retval None
2542 */
LL_ADC_SetDSDataOutputRatio(ADC_TypeDef * ADCx,uint32_t Ratio)2543 __STATIC_INLINE void LL_ADC_SetDSDataOutputRatio(ADC_TypeDef *ADCx, uint32_t Ratio)
2544 {
2545 MODIFY_REG(ADCx->DS_CONF, ADC_DS_CONF_DS_RATIO, Ratio);
2546 }
2547
2548
2549 /**
2550 * @brief Get the ratio of the Down Sampler (DS).
2551 * @rmtoll DS_CONF DS_RATIO LL_ADC_GetDSDataOutputRatio
2552 * @param ADCx ADC instance
2553 * @retval Returned value can be one of the following values:
2554 * @arg @ref LL_ADC_DS_RATIO_1 (no down sampling, default)
2555 * @arg @ref LL_ADC_DS_RATIO_2
2556 * @arg @ref LL_ADC_DS_RATIO_4
2557 * @arg @ref LL_ADC_DS_RATIO_8
2558 * @arg @ref LL_ADC_DS_RATIO_16
2559 * @arg @ref LL_ADC_DS_RATIO_32
2560 * @arg @ref LL_ADC_DS_RATIO_64
2561 * @arg @ref LL_ADC_DS_RATIO_128
2562 */
LL_ADC_GetDSDataOutputRatio(const ADC_TypeDef * ADCx)2563 __STATIC_INLINE uint32_t LL_ADC_GetDSDataOutputRatio(const ADC_TypeDef *ADCx)
2564 {
2565 return (uint32_t)(READ_BIT(ADCx->DS_CONF, ADC_DS_CONF_DS_RATIO));
2566 }
2567
2568 /**
2569 * @}
2570 */
2571
2572
2573 /** @defgroup ADC_LL_EF_Sequence_Configuration ADC Sequence Configuration functions
2574 * @{
2575 */
2576
2577 /**
2578 * @brief Set ADC sequence: channel on the selected
2579 * scan sequence rank.
2580 * @note This function performs configuration of:
2581 * - Channels ordering into each rank of scan sequence:
2582 * whatever channel can be placed into whatever rank.
2583 * @note On this STM32 series, ADCsequencer is
2584 * fully configurable: sequencer length and each rank
2585 * affectation to a channel are configurable.
2586 * Refer to description of function @ref LL_ADC_SetSequencerLength().
2587 * @note Depending on devices and packages, some channels may not be available.
2588 * Refer to device datasheet for channels availability.
2589 * @rmtoll SEQ_1 SEQ1 LL_ADC_SetSequencerRanks\n
2590 * SEQ_1 SEQ1 LL_ADC_SetSequencerRanks\n
2591 * SEQ_1 SEQ2 LL_ADC_SetSequencerRanks\n
2592 * SEQ_1 SEQ3 LL_ADC_SetSequencerRanks\n
2593 * SEQ_1 SEQ4 LL_ADC_SetSequencerRanks\n
2594 * SEQ_1 SEQ5 LL_ADC_SetSequencerRanks\n
2595 * SEQ_1 SEQ6 LL_ADC_SetSequencerRanks\n
2596 * SEQ_1 SEQ7 LL_ADC_SetSequencerRanks\n
2597 * SEQ_2 SEQ8 LL_ADC_SetSequencerRanks\n
2598 * SEQ_2 SEQ9 LL_ADC_SetSequencerRanks\n
2599 * SEQ_2 SEQ10 LL_ADC_SetSequencerRanks\n
2600 * SEQ_2 SEQ11 LL_ADC_SetSequencerRanks\n
2601 * SEQ_2 SEQ12 LL_ADC_SetSequencerRanks\n
2602 * SEQ_2 SEQ13 LL_ADC_SetSequencerRanks\n
2603 * SEQ_2 SEQ14 LL_ADC_SetSequencerRanks\n
2604 * SEQ_2 SEQ15 LL_ADC_SetSequencerRanks
2605 * @param ADCx ADC instance
2606 * @param Rank This parameter can be one of the following values:
2607 * @arg @ref LL_ADC_RANK_1
2608 * @arg @ref LL_ADC_RANK_2
2609 * @arg @ref LL_ADC_RANK_3
2610 * @arg @ref LL_ADC_RANK_4
2611 * @arg @ref LL_ADC_RANK_5
2612 * @arg @ref LL_ADC_RANK_6
2613 * @arg @ref LL_ADC_RANK_7
2614 * @arg @ref LL_ADC_RANK_8
2615 * @arg @ref LL_ADC_RANK_9
2616 * @arg @ref LL_ADC_RANK_10
2617 * @arg @ref LL_ADC_RANK_11
2618 * @arg @ref LL_ADC_RANK_12
2619 * @arg @ref LL_ADC_RANK_13
2620 * @arg @ref LL_ADC_RANK_14
2621 * @arg @ref LL_ADC_RANK_15
2622 * @arg @ref LL_ADC_RANK_16
2623 * @param Channel This parameter can be one of the following values:
2624 * @arg @ref LL_ADC_CHANNEL_VINM0
2625 * @arg @ref LL_ADC_CHANNEL_VINM1
2626 * @arg @ref LL_ADC_CHANNEL_VINM2
2627 * @arg @ref LL_ADC_CHANNEL_VINM3
2628 * @arg @ref LL_ADC_CHANNEL_VINP0
2629 * @arg @ref LL_ADC_CHANNEL_VINP1
2630 * @arg @ref LL_ADC_CHANNEL_VINP2
2631 * @arg @ref LL_ADC_CHANNEL_VINP3
2632 * @arg @ref LL_ADC_CHANNEL_VINP0_VINM0
2633 * @arg @ref LL_ADC_CHANNEL_VINP1_VINM1
2634 * @arg @ref LL_ADC_CHANNEL_VINP2_VINM2
2635 * @arg @ref LL_ADC_CHANNEL_VINP3_VINM3
2636 * @arg @ref LL_ADC_CHANNEL_VBAT
2637 * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2638 * @retval None
2639 */
LL_ADC_SetSequencerRanks(ADC_TypeDef * ADCx,uint32_t Rank,uint32_t Channel)2640 __STATIC_INLINE void LL_ADC_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
2641 {
2642 /* Set bits with content of parameter "Channel" with bits position */
2643 /* in register and register position depending on parameter "Rank". */
2644 /* Parameters "Rank" and "Channel" are used with masks because containing */
2645 /* other bits reserved for other purpose. */
2646 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SEQ_1,
2647 ((Rank & ADC_SEQ_X_REGOFFSET_MASK) >> ADC_SEQ_X_REGOFFSET_POS));
2648
2649 MODIFY_REG(*preg,
2650 ADC_SEQ_1_SEQ0 << (Rank & ADC_RANK_ID_SEQ_X_MASK),
2651 (Channel) << (Rank & ADC_RANK_ID_SEQ_X_MASK));
2652 }
2653
2654
2655 /**
2656 * @brief Get ADC sequence: channel on the selected
2657 * scan sequence rank.
2658 * @note On this STM32 series, ADC sequencer is
2659 * fully configurable: sequencer length and each rank
2660 * affectation to a channel are configurable.
2661 * Refer to description of function @ref LL_ADC_SetSequencerLength().
2662 * @note Depending on devices and packages, some channels may not be available.
2663 * Refer to device datasheet for channels availability.
2664 * @rmtoll SEQ_1 SEQ0 LL_ADC_GetSequencerRanks\n
2665 * SEQ_1 SEQ1 LL_ADC_GetSequencerRanks\n
2666 * SEQ_1 SEQ2 LL_ADC_GetSequencerRanks\n
2667 * SEQ_1 SEQ3 LL_ADC_GetSequencerRanks\n
2668 * SEQ_1 SEQ4 LL_ADC_GetSequencerRanks\n
2669 * SEQ_1 SEQ5 LL_ADC_GetSequencerRanks\n
2670 * SEQ_1 SEQ6 LL_ADC_GetSequencerRanks\n
2671 * SEQ_1 SEQ7 LL_ADC_GetSequencerRanks\n
2672 * SEQ_2 SEQ8 LL_ADC_GetSequencerRanks\n
2673 * SEQ_2 SEQ9 LL_ADC_GetSequencerRanks\n
2674 * SEQ_2 SEQ10 LL_ADC_GetSequencerRanks\n
2675 * SEQ_2 SEQ11 LL_ADC_GetSequencerRanks\n
2676 * SEQ_2 SEQ12 LL_ADC_GetSequencerRanks\n
2677 * SEQ_2 SEQ13 LL_ADC_GetSequencerRanks\n
2678 * SEQ_2 SEQ14 LL_ADC_GetSequencerRanks\n
2679 * SEQ_2 SEQ15 LL_ADC_GetSequencerRanks
2680 * @param ADCx ADC instance
2681 * @param Rank This parameter can be one of the following values:
2682 * @arg @ref LL_ADC_RANK_1
2683 * @arg @ref LL_ADC_RANK_2
2684 * @arg @ref LL_ADC_RANK_3
2685 * @arg @ref LL_ADC_RANK_4
2686 * @arg @ref LL_ADC_RANK_5
2687 * @arg @ref LL_ADC_RANK_6
2688 * @arg @ref LL_ADC_RANK_7
2689 * @arg @ref LL_ADC_RANK_8
2690 * @arg @ref LL_ADC_RANK_9
2691 * @arg @ref LL_ADC_RANK_10
2692 * @arg @ref LL_ADC_RANK_11
2693 * @arg @ref LL_ADC_RANK_12
2694 * @arg @ref LL_ADC_RANK_13
2695 * @arg @ref LL_ADC_RANK_14
2696 * @arg @ref LL_ADC_RANK_15
2697 * @arg @ref LL_ADC_RANK_16
2698 * @retval Returned value can be one of the following values:
2699 * @arg @ref LL_ADC_CHANNEL_VINM0
2700 * @arg @ref LL_ADC_CHANNEL_VINM1
2701 * @arg @ref LL_ADC_CHANNEL_VINM2
2702 * @arg @ref LL_ADC_CHANNEL_VINM3
2703 * @arg @ref LL_ADC_CHANNEL_VINP0
2704 * @arg @ref LL_ADC_CHANNEL_VINP1
2705 * @arg @ref LL_ADC_CHANNEL_VINP2
2706 * @arg @ref LL_ADC_CHANNEL_VINP3
2707 * @arg @ref LL_ADC_CHANNEL_VINP0_VINM0
2708 * @arg @ref LL_ADC_CHANNEL_VINP1_VINM1
2709 * @arg @ref LL_ADC_CHANNEL_VINP2_VINM2
2710 * @arg @ref LL_ADC_CHANNEL_VINP3_VINM3
2711 * @arg @ref LL_ADC_CHANNEL_VBAT
2712 * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2713 */
LL_ADC_GetSequencerRanks(const ADC_TypeDef * ADCx,uint32_t Rank)2714 __STATIC_INLINE uint32_t LL_ADC_GetSequencerRanks(const ADC_TypeDef *ADCx, uint32_t Rank)
2715 {
2716 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SEQ_1,
2717 ((Rank & ADC_SEQ_X_REGOFFSET_MASK) >> ADC_SEQ_X_REGOFFSET_POS));
2718
2719 return (uint32_t)((READ_BIT(*preg,
2720 ADC_SEQ_1_SEQ0 << (Rank & ADC_RANK_ID_SEQ_X_MASK))
2721 >> (Rank & ADC_RANK_ID_SEQ_X_MASK))
2722 );
2723 }
2724
2725 /**
2726 * @}
2727 */
2728
2729
2730 /** @defgroup ADC_LL_EF_Calibration_Points_Configuration ADC Calibration Points Configuration functions
2731 * @{
2732 */
2733
2734 /**
2735 * @brief Configure the gain and the offset of the calibration point 1.
2736 * @param ADCx ADC instance
2737 * @param Gain the gain of the first calibration point.
2738 * @param Offset the signed offset of the first calibration point.
2739 * @param Point This parameter can be one of the following values:
2740 * @arg @ref LL_ADC_CALIB_POINT_1
2741 * @arg @ref LL_ADC_CALIB_POINT_2
2742 * @arg @ref LL_ADC_CALIB_POINT_3
2743 * @arg @ref LL_ADC_CALIB_POINT_4
2744 * @retval None
2745 */
LL_ADC_ConfigureCalibPoint(ADC_TypeDef * ADCx,uint32_t Point,uint32_t Gain,uint32_t Offset)2746 __STATIC_INLINE void LL_ADC_ConfigureCalibPoint(ADC_TypeDef *ADCx, uint32_t Point, uint32_t Gain, uint32_t Offset)
2747 {
2748 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->COMP_1, Point);
2749
2750 MODIFY_REG(*preg, (ADC_COMP_1_GAIN1 | ADC_COMP_1_OFFSET1),
2751 ((Gain & ADC_COMP_1_GAIN1) | ((Offset << ADC_COMP_1_OFFSET1_Pos) & ADC_COMP_1_OFFSET1)));
2752 }
2753
2754 /**
2755 * @brief Set the gain of the calibration point 1.
2756 * @rmtoll COMP_1 GAIN1 LL_ADC_SetCalibPointGain
2757 * @param ADCx ADC instance
2758 * @param Gain the gain of the first calibration point.
2759 * @param Point This parameter can be one of the following values:
2760 * @arg @ref LL_ADC_CALIB_POINT_1
2761 * @arg @ref LL_ADC_CALIB_POINT_2
2762 * @arg @ref LL_ADC_CALIB_POINT_3
2763 * @arg @ref LL_ADC_CALIB_POINT_4
2764 * @retval None
2765 */
LL_ADC_SetCalibPointGain(ADC_TypeDef * ADCx,uint32_t Point,uint32_t Gain)2766 __STATIC_INLINE void LL_ADC_SetCalibPointGain(ADC_TypeDef *ADCx, uint32_t Point, uint32_t Gain)
2767 {
2768 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->COMP_1, Point);
2769
2770 MODIFY_REG(*preg, ADC_COMP_1_GAIN1, Gain);
2771 }
2772
2773
2774 /**
2775 * @brief Get the gain of the calibration point 1.
2776 * @rmtoll COMP_1 GAIN1 LL_ADC_GetCalibPoint1Gain
2777 * @param ADCx ADC instance
2778 * @param Point This parameter can be one of the following values:
2779 * @arg @ref LL_ADC_CALIB_POINT_1
2780 * @arg @ref LL_ADC_CALIB_POINT_2
2781 * @arg @ref LL_ADC_CALIB_POINT_3
2782 * @arg @ref LL_ADC_CALIB_POINT_4
2783 * @retval Return the gain of the first calibration point.
2784 */
LL_ADC_GetCalibPointGain(const ADC_TypeDef * ADCx,uint32_t Point)2785 __STATIC_INLINE uint32_t LL_ADC_GetCalibPointGain(const ADC_TypeDef *ADCx, uint32_t Point)
2786 {
2787 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->COMP_1, Point);
2788
2789 return (uint32_t)(READ_BIT(*preg, ADC_COMP_1_GAIN1));
2790 }
2791
2792
2793 /**
2794 * @brief Set the offset of the calibration point 1.
2795 * @rmtoll COMP_1 OFFSET1 LL_ADC_SetCalibPoint1Offset
2796 * @param ADCx ADC instance
2797 * @param Offset the signed offset of the first calibration point.
2798 * @param Point This parameter can be one of the following values:
2799 * @arg @ref LL_ADC_CALIB_POINT_1
2800 * @arg @ref LL_ADC_CALIB_POINT_2
2801 * @arg @ref LL_ADC_CALIB_POINT_3
2802 * @arg @ref LL_ADC_CALIB_POINT_4
2803 * @retval None
2804 */
LL_ADC_SetCalibPointOffset(ADC_TypeDef * ADCx,uint32_t Point,uint8_t Offset)2805 __STATIC_INLINE void LL_ADC_SetCalibPointOffset(ADC_TypeDef *ADCx, uint32_t Point, uint8_t Offset)
2806 {
2807 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->COMP_1, Point);
2808
2809 MODIFY_REG(*preg, ADC_COMP_1_OFFSET1, (Offset << ADC_COMP_1_OFFSET1_Pos));
2810 }
2811
2812
2813 /**
2814 * @brief Get the offset of the calibration point 1.
2815 * @rmtoll COMP_1 OFFSET1 LL_ADC_GetCalibPoint1Offset
2816 * @param ADCx ADC instance
2817 * @param Point This parameter can be one of the following values:
2818 * @arg @ref LL_ADC_CALIB_POINT_1
2819 * @arg @ref LL_ADC_CALIB_POINT_2
2820 * @arg @ref LL_ADC_CALIB_POINT_3
2821 * @arg @ref LL_ADC_CALIB_POINT_4
2822 * @retval Return the signed offset of the first calibration point.
2823 */
LL_ADC_GetCalibPointOffset(const ADC_TypeDef * ADCx,uint32_t Point)2824 __STATIC_INLINE uint32_t LL_ADC_GetCalibPointOffset(const ADC_TypeDef *ADCx, uint32_t Point)
2825 {
2826 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->COMP_1, Point);
2827
2828 return (uint32_t)(READ_BIT(*preg, ADC_COMP_1_OFFSET1) >> ADC_COMP_1_OFFSET1_Pos);
2829 }
2830
2831 /**
2832 * @brief Set the use of a specific calibration point for ADC differential mode
2833 * @rmtoll COMP_SEL ADC_COMP_SEL_OFFSET_GAIN8 LL_ADC_SetCalibPointForDiff
2834 * @param ADCx ADC instance
2835 * @param Point This parameter can be one of the following values:
2836 * @arg @ref LL_ADC_CALIB_POINT_1
2837 * @arg @ref LL_ADC_CALIB_POINT_2
2838 * @arg @ref LL_ADC_CALIB_POINT_3
2839 * @arg @ref LL_ADC_CALIB_POINT_4
2840 * @param Range This parameter can be one of the following values:
2841 * @arg @ref LL_ADC_VIN_RANGE_1V2
2842 * @arg @ref LL_ADC_VIN_RANGE_2V4
2843 * @arg @ref LL_ADC_VIN_RANGE_3V6
2844 * @retval None
2845 */
LL_ADC_SetCalibPointForDiff(ADC_TypeDef * ADCx,uint32_t Point,uint32_t Range)2846 __STATIC_INLINE void LL_ADC_SetCalibPointForDiff(ADC_TypeDef *ADCx, uint32_t Point, uint32_t Range)
2847 {
2848 if (Range == LL_ADC_VIN_RANGE_1V2)
2849 {
2850 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN2 << ADC_COMP_SEL_OFFSET_GAIN0_Pos),
2851 (Point << (ADC_COMP_SEL_OFFSET_GAIN2_Pos + ADC_COMP_SEL_OFFSET_GAIN0_Pos)));
2852 }
2853 else if (Range == LL_ADC_VIN_RANGE_2V4)
2854 {
2855 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN2 << ADC_COMP_SEL_OFFSET_GAIN3_Pos),
2856 (Point << (ADC_COMP_SEL_OFFSET_GAIN2_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2857 }
2858 else
2859 {
2860 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN2 << ADC_COMP_SEL_OFFSET_GAIN6_Pos),
2861 (Point << (ADC_COMP_SEL_OFFSET_GAIN2_Pos + ADC_COMP_SEL_OFFSET_GAIN6_Pos)));
2862 }
2863 }
2864
2865
2866 /**
2867 * @brief Get what calibration point is used for ADC differential mode.
2868 * @rmtoll COMP_SEL ADC_COMP_SEL_OFFSET_GAIN8 LL_ADC_GetCalibPointForDiff
2869 * @param ADCx ADC instance
2870 * @param Range This parameter can be one of the following values:
2871 * @arg @ref LL_ADC_VIN_RANGE_1V2
2872 * @arg @ref LL_ADC_VIN_RANGE_2V4
2873 * @arg @ref LL_ADC_VIN_RANGE_3V6
2874 * @retval Returned value can be one of the following values:
2875 * @arg @ref LL_ADC_CALIB_POINT_1
2876 * @arg @ref LL_ADC_CALIB_POINT_2
2877 * @arg @ref LL_ADC_CALIB_POINT_3
2878 * @arg @ref LL_ADC_CALIB_POINT_4
2879 */
LL_ADC_GetCalibPointForDiff(const ADC_TypeDef * ADCx,uint32_t Range)2880 __STATIC_INLINE uint32_t LL_ADC_GetCalibPointForDiff(const ADC_TypeDef *ADCx, uint32_t Range)
2881 {
2882 if (Range == LL_ADC_VIN_RANGE_1V2)
2883 {
2884 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN2)
2885 >> ADC_COMP_SEL_OFFSET_GAIN2_Pos));
2886 }
2887 else if (Range == LL_ADC_VIN_RANGE_2V4)
2888 {
2889 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN2 << ADC_COMP_SEL_OFFSET_GAIN3_Pos)
2890 >> (ADC_COMP_SEL_OFFSET_GAIN2_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2891 }
2892 else
2893 {
2894 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN2 << ADC_COMP_SEL_OFFSET_GAIN6_Pos)
2895 >> (ADC_COMP_SEL_OFFSET_GAIN2_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2896 }
2897 }
2898
2899 /**
2900 * @brief Set the use of a specific calibration point for
2901 * ADC single positive mode
2902 * @rmtoll COMP_SEL ADC_COMP_SEL_OFFSET_GAIN7 LL_ADC_SetCalibPointForSinglePos3V6
2903 * @param ADCx ADC instance
2904 * @param Point This parameter can be one of the following values:
2905 * @arg @ref LL_ADC_CALIB_POINT_1
2906 * @arg @ref LL_ADC_CALIB_POINT_2
2907 * @arg @ref LL_ADC_CALIB_POINT_3
2908 * @arg @ref LL_ADC_CALIB_POINT_4
2909 * @param Range This parameter can be one of the following values:
2910 * @arg @ref LL_ADC_VIN_RANGE_1V2
2911 * @arg @ref LL_ADC_VIN_RANGE_2V4
2912 * @arg @ref LL_ADC_VIN_RANGE_3V6
2913 * @retval None
2914 */
LL_ADC_SetCalibPointForSinglePos(ADC_TypeDef * ADCx,uint32_t Point,uint32_t Range)2915 __STATIC_INLINE void LL_ADC_SetCalibPointForSinglePos(ADC_TypeDef *ADCx, uint32_t Point, uint32_t Range)
2916 {
2917 if (Range == LL_ADC_VIN_RANGE_1V2)
2918 {
2919 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN1 << ADC_COMP_SEL_OFFSET_GAIN0_Pos),
2920 (Point << (ADC_COMP_SEL_OFFSET_GAIN1_Pos + ADC_COMP_SEL_OFFSET_GAIN0_Pos)));
2921 }
2922 else if (Range == LL_ADC_VIN_RANGE_2V4)
2923 {
2924 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN1 << ADC_COMP_SEL_OFFSET_GAIN3_Pos),
2925 (Point << (ADC_COMP_SEL_OFFSET_GAIN1_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2926 }
2927 else
2928 {
2929 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN1 << ADC_COMP_SEL_OFFSET_GAIN6_Pos),
2930 (Point << (ADC_COMP_SEL_OFFSET_GAIN1_Pos + ADC_COMP_SEL_OFFSET_GAIN6_Pos)));
2931 }
2932 }
2933
2934
2935 /**
2936 * @brief Get what calibration point is used for
2937 * ADC single positive mode
2938 * @rmtoll COMP_SEL ADC_COMP_SEL_OFFSET_GAIN7 LL_ADC_GetCalibPointForSinglePos3V6
2939 * @param ADCx ADC instance
2940 * @param Range This parameter can be one of the following values:
2941 * @arg @ref LL_ADC_VIN_RANGE_1V2
2942 * @arg @ref LL_ADC_VIN_RANGE_2V4
2943 * @arg @ref LL_ADC_VIN_RANGE_3V6
2944 * @retval Returned value can be one of the following values:
2945 * @arg @ref LL_ADC_CALIB_POINT_1
2946 * @arg @ref LL_ADC_CALIB_POINT_2
2947 * @arg @ref LL_ADC_CALIB_POINT_3
2948 * @arg @ref LL_ADC_CALIB_POINT_4
2949 */
LL_ADC_GetCalibPointForSinglePos(const ADC_TypeDef * ADCx,uint32_t Range)2950 __STATIC_INLINE uint32_t LL_ADC_GetCalibPointForSinglePos(const ADC_TypeDef *ADCx, uint32_t Range)
2951 {
2952 if (Range == LL_ADC_VIN_RANGE_1V2)
2953 {
2954 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN1) >> ADC_COMP_SEL_OFFSET_GAIN1_Pos));
2955 }
2956 else if (Range == LL_ADC_VIN_RANGE_2V4)
2957 {
2958 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN1 << ADC_COMP_SEL_OFFSET_GAIN3_Pos)
2959 >> (ADC_COMP_SEL_OFFSET_GAIN1_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2960 }
2961 else
2962 {
2963 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN1 << ADC_COMP_SEL_OFFSET_GAIN6_Pos)
2964 >> (ADC_COMP_SEL_OFFSET_GAIN1_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2965 }
2966 }
2967
2968 /**
2969 * @brief Set the use of a specific calibration point for
2970 * ADC single negative mode
2971 * and battery level detector.
2972 * @rmtoll COMP_SEL ADC_COMP_SEL_OFFSET_GAIN6 LL_ADC_SetCalibPointForSingleNeg
2973 * @param ADCx ADC instance
2974 * @param Point This parameter can be one of the following values:
2975 * @arg @ref LL_ADC_CALIB_POINT_1
2976 * @arg @ref LL_ADC_CALIB_POINT_2
2977 * @arg @ref LL_ADC_CALIB_POINT_3
2978 * @arg @ref LL_ADC_CALIB_POINT_4
2979 * @param Range This parameter can be one of the following values:
2980 * @arg @ref LL_ADC_VIN_RANGE_1V2
2981 * @arg @ref LL_ADC_VIN_RANGE_2V4
2982 * @arg @ref LL_ADC_VIN_RANGE_3V6
2983 * @retval None
2984 */
LL_ADC_SetCalibPointForSingleNeg(ADC_TypeDef * ADCx,uint32_t Point,uint32_t Range)2985 __STATIC_INLINE void LL_ADC_SetCalibPointForSingleNeg(ADC_TypeDef *ADCx, uint32_t Point, uint32_t Range)
2986 {
2987 if (Range == LL_ADC_VIN_RANGE_1V2)
2988 {
2989 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN0 << ADC_COMP_SEL_OFFSET_GAIN0_Pos),
2990 (Point << (ADC_COMP_SEL_OFFSET_GAIN0_Pos + ADC_COMP_SEL_OFFSET_GAIN0_Pos)));
2991 }
2992 else if (Range == LL_ADC_VIN_RANGE_2V4)
2993 {
2994 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN0 << ADC_COMP_SEL_OFFSET_GAIN3_Pos),
2995 (Point << (ADC_COMP_SEL_OFFSET_GAIN0_Pos + ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
2996 }
2997 else
2998 {
2999 MODIFY_REG(ADCx->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN0 << ADC_COMP_SEL_OFFSET_GAIN6_Pos),
3000 (Point << (ADC_COMP_SEL_OFFSET_GAIN0_Pos + ADC_COMP_SEL_OFFSET_GAIN6_Pos)));
3001 }
3002 }
3003
3004
3005 /**
3006 * @brief Get what calibration point is used for
3007 * ADC single negative mode
3008 * and battery level detector.
3009 * @rmtoll COMP_SEL ADC_COMP_SEL_OFFSET_GAIN6 LL_ADC_GetCalibPointForSingleNeg
3010 * @param ADCx ADC instance
3011 * @param Range This parameter can be one of the following values:
3012 * @arg @ref LL_ADC_VIN_RANGE_1V2
3013 * @arg @ref LL_ADC_VIN_RANGE_2V4
3014 * @arg @ref LL_ADC_VIN_RANGE_3V6
3015 * @retval Returned value can be one of the following values:
3016 * @arg @ref LL_ADC_CALIB_POINT_1
3017 * @arg @ref LL_ADC_CALIB_POINT_2
3018 * @arg @ref LL_ADC_CALIB_POINT_3
3019 * @arg @ref LL_ADC_CALIB_POINT_4
3020 */
LL_ADC_GetCalibPointForSingleNeg(const ADC_TypeDef * ADCx,uint32_t Range)3021 __STATIC_INLINE uint32_t LL_ADC_GetCalibPointForSingleNeg(const ADC_TypeDef *ADCx, uint32_t Range)
3022 {
3023 if (Range == LL_ADC_VIN_RANGE_1V2)
3024 {
3025 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN0) >> ADC_COMP_SEL_OFFSET_GAIN0_Pos));
3026 }
3027 else if (Range == LL_ADC_VIN_RANGE_2V4)
3028 {
3029 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN0 << ADC_COMP_SEL_OFFSET_GAIN3_Pos)
3030 >> (ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
3031 }
3032 else
3033 {
3034 return ((uint32_t)(READ_BIT(ADCx->COMP_SEL, ADC_COMP_SEL_OFFSET_GAIN0 << ADC_COMP_SEL_OFFSET_GAIN6_Pos)
3035 >> (ADC_COMP_SEL_OFFSET_GAIN3_Pos)));
3036 }
3037 }
3038
3039 /**
3040 * @}
3041 */
3042
3043
3044 /** @defgroup ADC_LL_EF_AWD_TH_Configuration ADC Watchdog Thresholds Configuration functions
3045 * @{
3046 */
3047
3048 /**
3049 * @brief Configure the WatchDoG threshold low and high.
3050 * @param ADCx ADC instance
3051 * @param LowThreshold This parameter is a 12-bit value.
3052 * @param HighThreshold This parameter is a 12-bit value.
3053 * @retval None
3054 */
LL_ADC_ConfigureAWDThresholds(ADC_TypeDef * ADCx,uint32_t LowThreshold,uint32_t HighThreshold)3055 __STATIC_INLINE void LL_ADC_ConfigureAWDThresholds(ADC_TypeDef *ADCx, uint32_t LowThreshold, uint32_t HighThreshold)
3056 {
3057 MODIFY_REG(ADCx->WD_TH, (ADC_WD_TH_WD_LT | ADC_WD_TH_WD_HT), (LowThreshold | (HighThreshold << ADC_WD_TH_WD_HT_Pos)));
3058 }
3059
3060
3061 /**
3062 * @brief Set the WatchDoG threshold low.
3063 * @rmtoll WD_TH ADC_WD_TH_WD_LT LL_ADC_SetAWDThresholdLow
3064 * @param ADCx ADC instance
3065 * @param Threshold This parameter is a 12-bit value.
3066 * @retval None
3067 */
LL_ADC_SetAWDThresholdLow(ADC_TypeDef * ADCx,uint32_t Threshold)3068 __STATIC_INLINE void LL_ADC_SetAWDThresholdLow(ADC_TypeDef *ADCx, uint32_t Threshold)
3069 {
3070 MODIFY_REG(ADCx->WD_TH, ADC_WD_TH_WD_LT, Threshold);
3071 }
3072
3073
3074 /**
3075 * @brief Get the WatchDoG threshold low.
3076 * @rmtoll WD_TH ADC_WD_TH_WD_LT LL_ADC_GetAWDThresholdLow
3077 * @param ADCx ADC instance
3078 * @retval Returned value of the low threshold.
3079 */
LL_ADC_GetAWDThresholdLow(const ADC_TypeDef * ADCx)3080 __STATIC_INLINE uint32_t LL_ADC_GetAWDThresholdLow(const ADC_TypeDef *ADCx)
3081 {
3082 return ((uint32_t)(READ_BIT(ADCx->WD_TH, ADC_WD_TH_WD_LT)));
3083 }
3084
3085 /**
3086 * @brief Set the WatchDoG threshold high.
3087 * @rmtoll WD_TH ADC_WD_TH_WD_HT LL_ADC_SetAWDThresholdHigh
3088 * @param ADCx ADC instance
3089 * @param Threshold This parameter is a 12-bit value.
3090 * @retval None
3091 */
LL_ADC_SetAWDThresholdHigh(ADC_TypeDef * ADCx,uint32_t Threshold)3092 __STATIC_INLINE void LL_ADC_SetAWDThresholdHigh(ADC_TypeDef *ADCx, uint32_t Threshold)
3093 {
3094 MODIFY_REG(ADCx->WD_TH, ADC_WD_TH_WD_HT, (Threshold << ADC_WD_TH_WD_HT_Pos));
3095 }
3096
3097
3098 /**
3099 * @brief Get the WatchDoG threshold high.
3100 * @rmtoll WD_TH ADC_WD_TH_WD_HT LL_ADC_GetAWDThresholdHigh
3101 * @param ADCx ADC instance
3102 * @retval Returned value of the high threshold.
3103 */
LL_ADC_GetAWDThresholdHigh(const ADC_TypeDef * ADCx)3104 __STATIC_INLINE uint32_t LL_ADC_GetAWDThresholdHigh(const ADC_TypeDef *ADCx)
3105 {
3106 return ((uint32_t)(READ_BIT(ADCx->WD_TH, ADC_WD_TH_WD_HT) >> ADC_WD_TH_WD_HT_Pos));
3107 }
3108
3109
3110 /**
3111 * @brief Set the input channels the watchdog must check.
3112 * @note ChannelMask can be an OR of the listed parameters.
3113 * @rmtoll WD_CONF AWD_CHX LL_ADC_SetAWDInputChannels
3114 * @param ADCx ADC instance
3115 * @param ChannelMask This parameter can be a combination of the following values:
3116 * @arg @ref LL_ADC_AWD_CH_VINM0
3117 * @arg @ref LL_ADC_AWD_CH_VINM1
3118 * @arg @ref LL_ADC_AWD_CH_VINM2
3119 * @arg @ref LL_ADC_AWD_CH_VINM3
3120 * @arg @ref LL_ADC_AWD_CH_MICROM
3121 * @arg @ref LL_ADC_AWD_CH_VBAT
3122 * @arg @ref LL_ADC_AWD_CH_GND_NEG
3123 * @arg @ref LL_ADC_AWD_CH_VDDA_NEG
3124 * @arg @ref LL_ADC_AWD_CH_VINP0
3125 * @arg @ref LL_ADC_AWD_CH_VINP1
3126 * @arg @ref LL_ADC_AWD_CH_VINP2
3127 * @arg @ref LL_ADC_AWD_CH_VINP3
3128 * @arg @ref LL_ADC_AWD_CH_MICROP
3129 * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR
3130 * @arg @ref LL_ADC_AWD_CH_GND_POS
3131 * @arg @ref LL_ADC_AWD_CH_VDDA_POS
3132 * @retval None
3133 */
LL_ADC_SetAWDInputChannels(ADC_TypeDef * ADCx,uint32_t ChannelMask)3134 __STATIC_INLINE void LL_ADC_SetAWDInputChannels(ADC_TypeDef *ADCx, uint32_t ChannelMask)
3135 {
3136 MODIFY_REG(ADCx->WD_CONF, ADC_WD_CONF_AWD_CHX, ChannelMask);
3137 }
3138
3139
3140 /**
3141 * @brief Get the input channels the watchdog must check.
3142 * @note The returned value can be an OR of the listed parameters.
3143 * @rmtoll WD_CONF AWD_CHX LL_ADC_GetAWDInputChannels
3144 * @param ADCx ADC instance
3145 * @retval Returned value can be a combination of the following values:
3146 * @arg @ref LL_ADC_AWD_CH_VINM0
3147 * @arg @ref LL_ADC_AWD_CH_VINM1
3148 * @arg @ref LL_ADC_AWD_CH_VINM2
3149 * @arg @ref LL_ADC_AWD_CH_VINM3
3150 * @arg @ref LL_ADC_AWD_CH_MICROM
3151 * @arg @ref LL_ADC_AWD_CH_VBAT
3152 * @arg @ref LL_ADC_AWD_CH_GND_NEG
3153 * @arg @ref LL_ADC_AWD_CH_VDDA_NEG
3154 * @arg @ref LL_ADC_AWD_CH_VINP0
3155 * @arg @ref LL_ADC_AWD_CH_VINP1
3156 * @arg @ref LL_ADC_AWD_CH_VINP2
3157 * @arg @ref LL_ADC_AWD_CH_VINP3
3158 * @arg @ref LL_ADC_AWD_CH_MICROP
3159 * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR
3160 * @arg @ref LL_ADC_AWD_CH_GND_POS
3161 * @arg @ref LL_ADC_AWD_CH_VDDA_POS
3162 */
LL_ADC_GetAWDInputChannels(const ADC_TypeDef * ADCx)3163 __STATIC_INLINE uint32_t LL_ADC_GetAWDInputChannels(const ADC_TypeDef *ADCx)
3164 {
3165 return (uint32_t)(READ_BIT(ADCx->WD_CONF, ADC_WD_CONF_AWD_CHX));
3166 }
3167
3168
3169 /**
3170 * @}
3171 */
3172
3173
3174 /** @defgroup ADC_LL_EF_Output_Data ADC Output Data functions
3175 * @{
3176 */
3177
3178
3179 /**
3180 * @brief Get the 16-bit output data from the Down Sampler (DS).
3181 * @rmtoll DS_DATAOUT DS_DATA LL_ADC_DSGetOutputData
3182 * @param ADCx ADC instance
3183 * @retval The output data from DS.
3184 */
LL_ADC_DSGetOutputData(const ADC_TypeDef * ADCx)3185 __STATIC_INLINE uint32_t LL_ADC_DSGetOutputData(const ADC_TypeDef *ADCx)
3186 {
3187 return (uint32_t)(READ_BIT(ADCx->DS_DATAOUT, ADC_DS_DATAOUT_DS_DATA));
3188 }
3189
3190 #if defined(ADC_DF_DATAOUT_DF_DATA)
3191 /**
3192 * @brief Get the 16-bit output data from the Decimation Filter (DF).
3193 * @rmtoll DF_DATAOUT DF_DATA LL_ADC_DFGetOutputData
3194 * @param ADCx ADC instance
3195 * @retval The output data from DF.
3196 */
LL_ADC_DFGetOutputData(const ADC_TypeDef * ADCx)3197 __STATIC_INLINE uint32_t LL_ADC_DFGetOutputData(const ADC_TypeDef *ADCx)
3198 {
3199 return (uint32_t)(READ_BIT(ADCx->DF_DATAOUT, ADC_DF_DATAOUT_DF_DATA));
3200 }
3201 #endif /* DF_DATAOUT */
3202
3203 /**
3204 * @}
3205 */
3206
3207
3208 /** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
3209 * @{
3210 */
3211
3212 /**
3213 * @brief Get all the flags status.
3214 * @param ADCx ADC instance
3215 * @retval All the status flags of the register IRQ_STATUS.
3216 * The value is a combination of the following values:
3217 * @arg @ref LL_ADC_IRQ_FLAG_OVRFL
3218 * @arg @ref LL_ADC_IRQ_FLAG_OVRDF
3219 * @arg @ref LL_ADC_IRQ_FLAG_EODF
3220 * @arg @ref LL_ADC_IRQ_FLAG_OVRDS
3221 * @arg @ref LL_ADC_IRQ_FLAG_AWD1
3222 * @arg @ref LL_ADC_IRQ_FLAG_EOC
3223 * @arg @ref LL_ADC_IRQ_FLAG_EOS
3224 * @arg @ref LL_ADC_IRQ_FLAG_EODS
3225 */
LL_ADC_GetActiveFlags(ADC_TypeDef * ADCx)3226 __STATIC_INLINE uint32_t LL_ADC_GetActiveFlags(ADC_TypeDef *ADCx)
3227 {
3228 #if defined(LL_ADC_IRQ_FLAGS_MASK)
3229 return (uint32_t)(READ_BIT(ADCx->IRQ_STATUS, LL_ADC_IRQ_FLAGS_MASK));
3230 #else
3231 return 0;
3232 #endif /* LL_ADC_IRQ_FLAGS_MASK */
3233 }
3234
3235 /**
3236 * @brief Clear all the flags status.
3237 * @param ADCx ADC instance
3238 * @param FlagsMask This parameter can be a combination of the following values:
3239 * @arg @ref LL_ADC_IRQ_FLAG_OVRFL
3240 * @arg @ref LL_ADC_IRQ_FLAG_OVRDF
3241 * @arg @ref LL_ADC_IRQ_FLAG_EODF
3242 * @arg @ref LL_ADC_IRQ_FLAG_OVRDS
3243 * @arg @ref LL_ADC_IRQ_FLAG_AWD1
3244 * @arg @ref LL_ADC_IRQ_FLAG_EOC
3245 * @arg @ref LL_ADC_IRQ_FLAG_EOS
3246 * @arg @ref LL_ADC_IRQ_FLAG_EODS
3247 * @retval None.
3248 */
LL_ADC_ClearActiveFlags(ADC_TypeDef * ADCx,uint32_t FlagsMask)3249 __STATIC_INLINE void LL_ADC_ClearActiveFlags(ADC_TypeDef *ADCx, uint32_t FlagsMask)
3250 {
3251 WRITE_REG(ADCx->IRQ_STATUS, FlagsMask);
3252 }
3253
3254 /**
3255 * @brief Get if the flags status is set.
3256 * @param ADCx ADC instance
3257 * @param FlagsMask This parameter can be one of the following values:
3258 * @arg @ref LL_ADC_IRQ_FLAG_OVRFL
3259 * @arg @ref LL_ADC_IRQ_FLAG_OVRDF
3260 * @arg @ref LL_ADC_IRQ_FLAG_EODF
3261 * @arg @ref LL_ADC_IRQ_FLAG_OVRDS
3262 * @arg @ref LL_ADC_IRQ_FLAG_AWD1
3263 * @arg @ref LL_ADC_IRQ_FLAG_EOC
3264 * @arg @ref LL_ADC_IRQ_FLAG_EOS
3265 * @arg @ref LL_ADC_IRQ_FLAG_EODS
3266 * @retval State of bit (1 or 0).
3267 */
LL_ADC_IsActiveFlag(const ADC_TypeDef * ADCx,uint32_t FlagsMask)3268 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag(const ADC_TypeDef *ADCx, uint32_t FlagsMask)
3269 {
3270 return ((READ_BIT(ADCx->IRQ_STATUS, FlagsMask) == (FlagsMask)) ? 1UL : 0UL);
3271 }
3272
3273 #if defined(ADC_IRQ_STATUS_DF_OVRFL_IRQ)
3274 /**
3275 * @brief Get the status of the flag DF_OVRFL.
3276 * The flag indicates, if set, the Decimation Filter output is saturated.
3277 * @rmtoll IRQ_STATUS DF_OVRFL_IRQ LL_ADC_IsActiveFlag_DFOVRFL
3278 * @param ADCx ADC instance
3279 * @retval State of bit (1 or 0).
3280 */
LL_ADC_IsActiveFlag_DFOVRFL(const ADC_TypeDef * ADCx)3281 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_DFOVRFL(const ADC_TypeDef *ADCx)
3282 {
3283 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_DF_OVRFL_IRQ) == (ADC_IRQ_STATUS_DF_OVRFL_IRQ)) ? 1UL : 0UL);
3284 }
3285
3286 /**
3287 * @brief Clear the flag DF_OVRFL.
3288 * @rmtoll IRQ_STATUS DF_OVRFL_IRQ LL_ADC_ClearFlag_DFOVRFL
3289 * @param ADCx ADC instance
3290 * @retval None
3291 */
LL_ADC_ClearFlag_DFOVRFL(ADC_TypeDef * ADCx)3292 __STATIC_INLINE void LL_ADC_ClearFlag_DFOVRFL(ADC_TypeDef *ADCx)
3293 {
3294 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_DF_OVRFL_IRQ);
3295 }
3296 #endif /* ADC_IRQ_STATUS_DF_OVRFL_IRQ */
3297
3298 #if defined(ADC_IRQ_STATUS_OVR_DF_IRQ)
3299 /**
3300 * @brief Get the status of the flag OVR_DF.
3301 * The flag indicates, if set, the Decimation Filter output is overran (at least one data is lost).
3302 * @rmtoll IRQ_STATUS OVR_DF_IRQ LL_ADC_IsActiveFlag_OVRDF
3303 * @param ADCx ADC instance
3304 * @retval State of bit (1 or 0).
3305 */
LL_ADC_IsActiveFlag_OVRDF(const ADC_TypeDef * ADCx)3306 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVRDF(const ADC_TypeDef *ADCx)
3307 {
3308 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_OVR_DF_IRQ) == (ADC_IRQ_STATUS_OVR_DF_IRQ)) ? 1UL : 0UL);
3309 }
3310
3311 /**
3312 * @brief Clear the flag OVR_DF.
3313 * @rmtoll IRQ_STATUS OVR_DF_IRQ LL_ADC_ClearFlag_OVRDF
3314 * @param ADCx ADC instance
3315 * @retval None
3316 */
LL_ADC_ClearFlag_OVRDF(ADC_TypeDef * ADCx)3317 __STATIC_INLINE void LL_ADC_ClearFlag_OVRDF(ADC_TypeDef *ADCx)
3318 {
3319 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_OVR_DF_IRQ);
3320 }
3321 #endif /* ADC_IRQ_STATUS_OVR_DF_IRQ */
3322
3323 /**
3324 * @brief Get the status of the flag OVR_DS.
3325 * The flag indicates, if set, the Down Sampler output is overran (at least one data is lost).
3326 * @rmtoll IRQ_STATUS OVR_DS_IRQ LL_ADC_IsActiveFlag_OVRDS
3327 * @param ADCx ADC instance
3328 * @retval State of bit (1 or 0).
3329 */
LL_ADC_IsActiveFlag_OVRDS(const ADC_TypeDef * ADCx)3330 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVRDS(const ADC_TypeDef *ADCx)
3331 {
3332 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_OVR_DS_IRQ) == (ADC_IRQ_STATUS_OVR_DS_IRQ)) ? 1UL : 0UL);
3333 }
3334
3335 /**
3336 * @brief Clear the flag OVR_DS.
3337 * @rmtoll IRQ_STATUS OVR_DS_IRQ LL_ADC_ClearFlag_OVRDS
3338 * @param ADCx ADC instance
3339 * @retval None
3340 */
LL_ADC_ClearFlag_OVRDS(ADC_TypeDef * ADCx)3341 __STATIC_INLINE void LL_ADC_ClearFlag_OVRDS(ADC_TypeDef *ADCx)
3342 {
3343 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_OVR_DS_IRQ);
3344 }
3345
3346 /**
3347 * @brief Get the status of the flag AWD.
3348 * The flag indicates, if set, an event of the watchdog has occurred.
3349 * @rmtoll IRQ_STATUS AWD_IRQ LL_ADC_IsActiveFlag_AWD
3350 * @param ADCx ADC instance
3351 * @retval State of bit (1 or 0).
3352 */
LL_ADC_IsActiveFlag_AWD(const ADC_TypeDef * ADCx)3353 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD(const ADC_TypeDef *ADCx)
3354 {
3355 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_AWD_IRQ) == (ADC_IRQ_STATUS_AWD_IRQ)) ? 1UL : 0UL);
3356 }
3357
3358 /**
3359 * @brief Clear the flag AWD.
3360 * @rmtoll IRQ_STATUS AWD_IRQ LL_ADC_ClearFlag_AWD
3361 * @param ADCx ADC instance
3362 * @retval None
3363 */
LL_ADC_ClearFlag_AWD(ADC_TypeDef * ADCx)3364 __STATIC_INLINE void LL_ADC_ClearFlag_AWD(ADC_TypeDef *ADCx)
3365 {
3366 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_AWD_IRQ);
3367 }
3368
3369 /**
3370 * @brief Get the status of the flag EOS.
3371 * The flag indicates, if set, the End Of a Sequence of conversion.
3372 * @rmtoll IRQ_STATUS EOS_IRQ LL_ADC_IsActiveFlag_EOS
3373 * @param ADCx ADC instance
3374 * @retval State of bit (1 or 0).
3375 */
LL_ADC_IsActiveFlag_EOS(const ADC_TypeDef * ADCx)3376 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(const ADC_TypeDef *ADCx)
3377 {
3378 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EOS_IRQ) == (ADC_IRQ_STATUS_EOS_IRQ)) ? 1UL : 0UL);
3379 }
3380
3381 /**
3382 * @brief Clear the flag EOS.
3383 * @rmtoll IRQ_STATUS EOS_IRQ LL_ADC_ClearFlag_EOS
3384 * @param ADCx ADC instance
3385 * @retval None
3386 */
LL_ADC_ClearFlag_EOS(ADC_TypeDef * ADCx)3387 __STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
3388 {
3389 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EOS_IRQ);
3390 }
3391
3392 #if defined(ADC_IRQ_STATUS_EODF_IRQ)
3393 /**
3394 * @brief Get the status of the flag EODF.
3395 * The flag indicates, if set, the End Of a Decimation Filter conversion.
3396 * @rmtoll IRQ_STATUS EODF_IRQ LL_ADC_IsActiveFlag_EODF
3397 * @param ADCx ADC instance
3398 * @retval State of bit (1 or 0).
3399 */
LL_ADC_IsActiveFlag_EODF(const ADC_TypeDef * ADCx)3400 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EODF(const ADC_TypeDef *ADCx)
3401 {
3402 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EODF_IRQ) == (ADC_IRQ_STATUS_EODF_IRQ)) ? 1UL : 0UL);
3403 }
3404
3405 /**
3406 * @brief Clear the flag EODF.
3407 * @rmtoll IRQ_STATUS EODF_IRQ LL_ADC_ClearFlag_EODF
3408 * @param ADCx ADC instance
3409 * @retval None
3410 */
LL_ADC_ClearFlag_EODF(ADC_TypeDef * ADCx)3411 __STATIC_INLINE void LL_ADC_ClearFlag_EODF(ADC_TypeDef *ADCx)
3412 {
3413 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EODF_IRQ);
3414 }
3415 #endif /* ADC_IRQ_STATUS_EODF_IRQ */
3416
3417 /**
3418 * @brief Get the status of the flag EODS.
3419 * The flag indicates, if set, the End Of a Down Sampler conversion.
3420 * @rmtoll IRQ_STATUS EODS_IRQ LL_ADC_IsActiveFlag_EODS
3421 * @param ADCx ADC instance
3422 * @retval State of bit (1 or 0).
3423 */
LL_ADC_IsActiveFlag_EODS(const ADC_TypeDef * ADCx)3424 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EODS(const ADC_TypeDef *ADCx)
3425 {
3426 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EODS_IRQ) == (ADC_IRQ_STATUS_EODS_IRQ)) ? 1UL : 0UL);
3427 }
3428
3429 /**
3430 * @brief Clear the flag EODS.
3431 * @rmtoll IRQ_STATUS EODS_IRQ LL_ADC_ClearFlag_EODS
3432 * @param ADCx ADC instance
3433 * @retval None
3434 */
LL_ADC_ClearFlag_EODS(ADC_TypeDef * ADCx)3435 __STATIC_INLINE void LL_ADC_ClearFlag_EODS(ADC_TypeDef *ADCx)
3436 {
3437 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EODS_IRQ);
3438 }
3439
3440 /**
3441 * @brief Get the status of the flag EOC.
3442 * The flag indicates, if set, the End Of Conversion.
3443 * @rmtoll IRQ_STATUS EOC_IRQ LL_ADC_IsActiveFlag_EOC
3444 * @param ADCx ADC instance
3445 * @retval State of bit (1 or 0).
3446 */
LL_ADC_IsActiveFlag_EOC(const ADC_TypeDef * ADCx)3447 __STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(const ADC_TypeDef *ADCx)
3448 {
3449 return ((READ_BIT(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EOC_IRQ) == (ADC_IRQ_STATUS_EOC_IRQ)) ? 1UL : 0UL);
3450 }
3451
3452
3453 /**
3454 * @brief Clear the flag EOC.
3455 * @rmtoll IRQ_STATUS EOC_IRQ LL_ADC_ClearFlag_EOC
3456 * @param ADCx ADC instance
3457 * @retval None
3458 */
LL_ADC_ClearFlag_EOC(ADC_TypeDef * ADCx)3459 __STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
3460 {
3461 WRITE_REG(ADCx->IRQ_STATUS, ADC_IRQ_STATUS_EOC_IRQ);
3462 }
3463
3464 /**
3465 * @}
3466 */
3467
3468 /** @defgroup ADC_LL_EF_IT_Management ADC IT management
3469 * @{
3470 */
3471
3472 /**
3473 * @brief Enable the interrupts according to the interrupt mask passed as parameter.
3474 * @param ADCx ADC instance
3475 * @param IrqMask This parameter can be a combination of the following values:
3476 * @arg @ref LL_ADC_IRQ_EN_OVRFL
3477 * @arg @ref LL_ADC_IRQ_EN_OVRDF
3478 * @arg @ref LL_ADC_IRQ_EN_EODF
3479 * @arg @ref LL_ADC_IRQ_EN_OVRDS
3480 * @arg @ref LL_ADC_IRQ_EN_AWD1
3481 * @arg @ref LL_ADC_IRQ_EN_EOS
3482 * @arg @ref LL_ADC_IRQ_EN_EODS
3483 * @retval None.
3484 */
LL_ADC_EnableIT(ADC_TypeDef * ADCx,uint32_t IrqMask)3485 __STATIC_INLINE void LL_ADC_EnableIT(ADC_TypeDef *ADCx, uint32_t IrqMask)
3486 {
3487 SET_BIT(ADCx->IRQ_ENABLE, IrqMask);
3488 }
3489
3490
3491 /**
3492 * @brief Disable the interrupts according to the interrupt mask passed as parameter.
3493 * @param ADCx ADC instance
3494 * @param IrqMask This parameter can be a combination of the following values:
3495 * @arg @ref LL_ADC_IRQ_EN_OVRFL
3496 * @arg @ref LL_ADC_IRQ_EN_OVRDF
3497 * @arg @ref LL_ADC_IRQ_EN_EODF
3498 * @arg @ref LL_ADC_IRQ_EN_OVRDS
3499 * @arg @ref LL_ADC_IRQ_EN_AWD1
3500 * @arg @ref LL_ADC_IRQ_EN_EOS
3501 * @arg @ref LL_ADC_IRQ_EN_EODS
3502 * @retval None.
3503 */
LL_ADC_DisableIT(ADC_TypeDef * ADCx,uint32_t IrqMask)3504 __STATIC_INLINE void LL_ADC_DisableIT(ADC_TypeDef *ADCx, uint32_t IrqMask)
3505 {
3506 CLEAR_BIT(ADCx->IRQ_ENABLE, IrqMask);
3507 }
3508
3509
3510 /**
3511 * @brief Get if the specific flag is enabled or not.
3512 * @param ADCx ADC instance
3513 * @param IrqMask This parameter can be one of the following values:
3514 * @arg @ref LL_ADC_IRQ_FLAG_OVRFL
3515 * @arg @ref LL_ADC_IRQ_FLAG_OVRDF
3516 * @arg @ref LL_ADC_IRQ_FLAG_EODF
3517 * @arg @ref LL_ADC_IRQ_FLAG_OVRDS
3518 * @arg @ref LL_ADC_IRQ_FLAG_AWD1
3519 * @arg @ref LL_ADC_IRQ_FLAG_EOC
3520 * @arg @ref LL_ADC_IRQ_FLAG_EOS
3521 * @arg @ref LL_ADC_IRQ_FLAG_EODS
3522 * @retval State of bit (1 or 0).
3523 */
LL_ADC_IsEnabledIT(const ADC_TypeDef * ADCx,uint32_t IrqMask)3524 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT(const ADC_TypeDef *ADCx, uint32_t IrqMask)
3525 {
3526 return ((READ_BIT(ADCx->IRQ_ENABLE, IrqMask) == (IrqMask)) ? 1UL : 0UL);
3527 }
3528
3529 #if defined(ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA)
3530 /**
3531 * @brief Enable the Decimation Filter saturated interrupt.
3532 * @rmtoll IRQ_ENABLE DF_OVRFL_IRQ_ENA LL_ADC_EnableIT_DFOVRFL
3533 * @param ADCx ADC instance
3534 * @retval None
3535 */
LL_ADC_EnableIT_DFOVRFL(ADC_TypeDef * ADCx)3536 __STATIC_INLINE void LL_ADC_EnableIT_DFOVRFL(ADC_TypeDef *ADCx)
3537 {
3538 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA);
3539 }
3540
3541
3542 /**
3543 * @brief Disable the Decimation Filter saturated interrupt.
3544 * @rmtoll IRQ_ENABLE DF_OVRFL_IRQ_ENA LL_ADC_DisableIT_DFOVRFL
3545 * @param ADCx ADC instance
3546 * @retval None
3547 */
LL_ADC_DisableIT_DFOVRFL(ADC_TypeDef * ADCx)3548 __STATIC_INLINE void LL_ADC_DisableIT_DFOVRFL(ADC_TypeDef *ADCx)
3549 {
3550 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA);
3551 }
3552
3553 /**
3554 * @brief Check if the Decimation Filter saturated interrupt is enabled.
3555 * @rmtoll IRQ_ENABLE DF_OVRFL_IRQ_ENA LL_ADC_IsEnabledIT_DFOVRFL
3556 * @param ADCx ADC instance
3557 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3558 */
LL_ADC_IsEnabledIT_DFOVRFL(const ADC_TypeDef * ADCx)3559 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_DFOVRFL(const ADC_TypeDef *ADCx)
3560 {
3561 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA) == (ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA))
3562 ? 1UL : 0UL);
3563 }
3564 #endif /* ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA */
3565
3566 #if defined(ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA)
3567 /**
3568 * @brief Enable the Decimation Filter overrun interrupt.
3569 * @rmtoll IRQ_ENABLE OVR_DF_IRQ_ENA LL_ADC_EnableIT_DFOVR
3570 * @param ADCx ADC instance
3571 * @retval None
3572 */
LL_ADC_EnableIT_DFOVR(ADC_TypeDef * ADCx)3573 __STATIC_INLINE void LL_ADC_EnableIT_DFOVR(ADC_TypeDef *ADCx)
3574 {
3575 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA);
3576 }
3577
3578
3579 /**
3580 * @brief Disable the Decimation Filter overrun interrupt.
3581 * @rmtoll IRQ_ENABLE OVR_DF_IRQ_ENA LL_ADC_DisableIT_DFOVR
3582 * @param ADCx ADC instance
3583 * @retval None
3584 */
LL_ADC_DisableIT_DFOVR(ADC_TypeDef * ADCx)3585 __STATIC_INLINE void LL_ADC_DisableIT_DFOVR(ADC_TypeDef *ADCx)
3586 {
3587 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA);
3588 }
3589
3590
3591 /**
3592 * @brief Check if the Decimation Filter overrun interrupt is enabled.
3593 * @rmtoll IRQ_ENABLE OVR_DF_IRQ_ENA LL_ADC_IsEnabledIT_DFOVR
3594 * @param ADCx ADC instance
3595 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3596 */
LL_ADC_IsEnabledIT_DFOVR(const ADC_TypeDef * ADCx)3597 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_DFOVR(const ADC_TypeDef *ADCx)
3598 {
3599 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA) == (ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA)) ? 1UL : 0UL);
3600 }
3601 #endif /* ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA */
3602
3603 /**
3604 * @brief Enable the Down Sampler overrun interrupt.
3605 * @rmtoll IRQ_ENABLE OVR_DS_IRQ_ENA LL_ADC_EnableIT_DSOVR
3606 * @param ADCx ADC instance
3607 * @retval None
3608 */
LL_ADC_EnableIT_DSOVR(ADC_TypeDef * ADCx)3609 __STATIC_INLINE void LL_ADC_EnableIT_DSOVR(ADC_TypeDef *ADCx)
3610 {
3611 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_OVR_DS_IRQ_ENA);
3612 }
3613
3614
3615 /**
3616 * @brief Disable the Down Sampler overrun interrupt.
3617 * @rmtoll IRQ_ENABLE OVR_DS_IRQ_ENA LL_ADC_DisableIT_DSOVR
3618 * @param ADCx ADC instance
3619 * @retval None
3620 */
LL_ADC_DisableIT_DSOVR(ADC_TypeDef * ADCx)3621 __STATIC_INLINE void LL_ADC_DisableIT_DSOVR(ADC_TypeDef *ADCx)
3622 {
3623 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_OVR_DS_IRQ_ENA);
3624 }
3625
3626
3627 /**
3628 * @brief Check if the Down Sampler overrun interrupt is enabled.
3629 * @rmtoll IRQ_ENABLE OVR_DS_IRQ_ENA LL_ADC_IsEnabledIT_DSOVR
3630 * @param ADCx ADC instance
3631 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3632 */
LL_ADC_IsEnabledIT_DSOVR(const ADC_TypeDef * ADCx)3633 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_DSOVR(const ADC_TypeDef *ADCx)
3634 {
3635 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_OVR_DS_IRQ_ENA) == (ADC_IRQ_ENABLE_OVR_DS_IRQ_ENA)) ? 1UL : 0UL);
3636 }
3637
3638
3639 /**
3640 * @brief Enable the watchdog event interrupt.
3641 * @rmtoll IRQ_ENABLE AWD_IRQ_ENA LL_ADC_EnableIT_AWD
3642 * @param ADCx ADC instance
3643 * @retval None
3644 */
LL_ADC_EnableIT_AWD(ADC_TypeDef * ADCx)3645 __STATIC_INLINE void LL_ADC_EnableIT_AWD(ADC_TypeDef *ADCx)
3646 {
3647 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_AWD_IRQ_ENA);
3648 }
3649
3650
3651 /**
3652 * @brief Disable the watchdog event interrupt.
3653 * @rmtoll IRQ_ENABLE AWD_IRQ_ENA LL_ADC_DisableIT_AWD
3654 * @param ADCx ADC instance
3655 * @retval None
3656 */
LL_ADC_DisableIT_AWD(ADC_TypeDef * ADCx)3657 __STATIC_INLINE void LL_ADC_DisableIT_AWD(ADC_TypeDef *ADCx)
3658 {
3659 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_AWD_IRQ_ENA);
3660 }
3661
3662
3663 /**
3664 * @brief Check if the watchdog event interrupt is enabled.
3665 * @rmtoll IRQ_ENABLE AWD_IRQ_ENA LL_ADC_IsEnabledIT_AWD
3666 * @param ADCx ADC instance
3667 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3668 */
LL_ADC_IsEnabledIT_AWD(const ADC_TypeDef * ADCx)3669 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD(const ADC_TypeDef *ADCx)
3670 {
3671 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_AWD_IRQ_ENA) == (ADC_IRQ_ENABLE_AWD_IRQ_ENA)) ? 1UL : 0UL);
3672 }
3673
3674
3675 /**
3676 * @brief Enable the End Of a Sequence of conversion interrupt.
3677 * @rmtoll IRQ_ENABLE EOS_IRQ_ENA LL_ADC_EnableIT_EOS
3678 * @param ADCx ADC instance
3679 * @retval None
3680 */
LL_ADC_EnableIT_EOS(ADC_TypeDef * ADCx)3681 __STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
3682 {
3683 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EOS_IRQ_ENA);
3684 }
3685
3686
3687 /**
3688 * @brief Disable the End Of a Sequence of conversion interrupt.
3689 * @rmtoll IRQ_ENABLE EOS_IRQ_ENA LL_ADC_DisableIT_EOS
3690 * @param ADCx ADC instance
3691 * @retval None
3692 */
LL_ADC_DisableIT_EOS(ADC_TypeDef * ADCx)3693 __STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
3694 {
3695 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EOS_IRQ_ENA);
3696 }
3697
3698
3699 /**
3700 * @brief Check if the End Of a Sequence of conversion interrupt is enabled.
3701 * @rmtoll IRQ_ENABLE EOS_IRQ_ENA LL_ADC_IsEnabledIT_EOS
3702 * @param ADCx ADC instance
3703 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3704 */
LL_ADC_IsEnabledIT_EOS(const ADC_TypeDef * ADCx)3705 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(const ADC_TypeDef *ADCx)
3706 {
3707 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EOS_IRQ_ENA) == (ADC_IRQ_ENABLE_EOS_IRQ_ENA)) ? 1UL : 0UL);
3708 }
3709
3710 #if defined(ADC_IRQ_ENABLE_EODF_IRQ_ENA)
3711 /**
3712 * @brief Enable the End Of a Decimation Filter conversion interrupt.
3713 * @rmtoll IRQ_ENABLE EODF_IRQ_ENA LL_ADC_EnableIT_EODF
3714 * @param ADCx ADC instance
3715 * @retval None
3716 */
LL_ADC_EnableIT_EODF(ADC_TypeDef * ADCx)3717 __STATIC_INLINE void LL_ADC_EnableIT_EODF(ADC_TypeDef *ADCx)
3718 {
3719 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EODF_IRQ_ENA);
3720 }
3721
3722
3723 /**
3724 * @brief Disable the End Of a Decimation Filter conversion interrupt.
3725 * @rmtoll IRQ_ENABLE EODF_IRQ_ENA LL_ADC_DisableIT_EODF
3726 * @param ADCx ADC instance
3727 * @retval None
3728 */
LL_ADC_DisableIT_EODF(ADC_TypeDef * ADCx)3729 __STATIC_INLINE void LL_ADC_DisableIT_EODF(ADC_TypeDef *ADCx)
3730 {
3731 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EODF_IRQ_ENA);
3732 }
3733
3734
3735 /**
3736 * @brief Check if the End Of a Decimation Filter conversion interrupt is enabled.
3737 * @rmtoll IRQ_ENABLE EODF_IRQ_ENA LL_ADC_IsEnabledIT_EODF
3738 * @param ADCx ADC instance
3739 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3740 */
LL_ADC_IsEnabledIT_EODF(const ADC_TypeDef * ADCx)3741 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EODF(const ADC_TypeDef *ADCx)
3742 {
3743 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EODF_IRQ_ENA) == (ADC_IRQ_ENABLE_EODF_IRQ_ENA)) ? 1UL : 0UL);
3744 }
3745 #endif /* ADC_IRQ_ENABLE_EODF_IRQ_ENA */
3746
3747 /**
3748 * @brief Enable the End Of a Down Sampler conversion interrupt.
3749 * @rmtoll IRQ_ENABLE EODS_IRQ_ENA LL_ADC_EnableIT_EODS
3750 * @param ADCx ADC instance
3751 * @retval None
3752 */
LL_ADC_EnableIT_EODS(ADC_TypeDef * ADCx)3753 __STATIC_INLINE void LL_ADC_EnableIT_EODS(ADC_TypeDef *ADCx)
3754 {
3755 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EODS_IRQ_ENA);
3756 }
3757
3758
3759 /**
3760 * @brief Disable the End Of a Down Sampler conversion interrupt.
3761 * @rmtoll IRQ_ENABLE EODS_IRQ_ENA LL_ADC_DisableIT_EODS
3762 * @param ADCx ADC instance
3763 * @retval None
3764 */
LL_ADC_DisableIT_EODS(ADC_TypeDef * ADCx)3765 __STATIC_INLINE void LL_ADC_DisableIT_EODS(ADC_TypeDef *ADCx)
3766 {
3767 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EODS_IRQ_ENA);
3768 }
3769
3770
3771 /**
3772 * @brief Check if the End Of a Down Sampler conversion interrupt is enabled.
3773 * @rmtoll IRQ_ENABLE EODS_IRQ_ENA LL_ADC_IsEnabledIT_EODS
3774 * @param ADCx ADC instance
3775 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3776 */
LL_ADC_IsEnabledIT_EODS(const ADC_TypeDef * ADCx)3777 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EODS(const ADC_TypeDef *ADCx)
3778 {
3779 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EODS_IRQ_ENA) == (ADC_IRQ_ENABLE_EODS_IRQ_ENA)) ? 1UL : 0UL);
3780 }
3781
3782 /**
3783 * @brief Enable the End Of Conversion interrupt.
3784 * @rmtoll IRQ_ENABLE EOC_IRQ_ENA LL_ADC_EnableIT_EOC
3785 * @param ADCx ADC instance
3786 * @retval None
3787 */
LL_ADC_EnableIT_EOC(ADC_TypeDef * ADCx)3788 __STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
3789 {
3790 SET_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EOC_IRQ_ENA);
3791 }
3792
3793
3794 /**
3795 * @brief Disable the End Of Conversion interrupt.
3796 * @rmtoll IRQ_ENABLE EOC_IRQ_ENA LL_ADC_DisableIT_EOC
3797 * @param ADCx ADC instance
3798 * @retval None
3799 */
LL_ADC_DisableIT_EOC(ADC_TypeDef * ADCx)3800 __STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
3801 {
3802 CLEAR_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EOC_IRQ_ENA);
3803 }
3804
3805
3806 /**
3807 * @brief Check if the End Of Conversion interrupt is enabled.
3808 * @rmtoll IRQ_ENABLE EOC_IRQ_ENA LL_ADC_IsEnabledIT_EOC
3809 * @param ADCx ADC instance
3810 * @retval 0: The interrupt is not enabled, 1: The interrupt is enabled.
3811 */
LL_ADC_IsEnabledIT_EOC(const ADC_TypeDef * ADCx)3812 __STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(const ADC_TypeDef *ADCx)
3813 {
3814 return ((READ_BIT(ADCx->IRQ_ENABLE, ADC_IRQ_ENABLE_EOC_IRQ_ENA) == (ADC_IRQ_ENABLE_EOC_IRQ_ENA)) ? 1UL : 0UL);
3815 }
3816
3817 /**
3818 * @}
3819 */
3820
3821
3822 /** @defgroup ADC_LL_EF_Delay_Setting ADC Dealy Setting
3823 * @{
3824 */
3825
3826 #if defined(ADC_TIMER_CONF_VBIAS_PRECH_DELAY)
3827 /**
3828 * @brief Set the duration of a waiting time starting at rising edge of
3829 * PGA_EN signal and corresponding to the VBIAS precharge duration.
3830 * The time unit is 4 us. Max delay is 1.02 ms, default value is 128 us.
3831 * @note The minimum recommended value for this bitfield is 150 to have 600 us.
3832 * @rmtoll TIMER_CONF VBIAS_PRECH_DELAY LL_ADC_SetVbiasPrechargeDelay
3833 * @param ADCx ADC instance
3834 * @param Delay This parameter is a 8-bit value.
3835 * @retval None
3836 */
LL_ADC_SetVbiasPrechargeDelay(ADC_TypeDef * ADCx,uint32_t Delay)3837 __STATIC_INLINE void LL_ADC_SetVbiasPrechargeDelay(ADC_TypeDef *ADCx, uint32_t Delay)
3838 {
3839 MODIFY_REG(ADCx->TIMER_CONF, ADC_TIMER_CONF_VBIAS_PRECH_DELAY, Delay << ADC_TIMER_CONF_VBIAS_PRECH_DELAY_Pos);
3840 }
3841
3842
3843 /**
3844 * @brief Get the duration of a waiting time starting at rising edge of
3845 * PGA_EN signal and corresponding to the VBIAS precharge duration.
3846 * The time unit is 4 us. Max delay is 1.02 ms.
3847 * @note The minimum recommended value for this bitfield is 150 to have 600 us.
3848 * @rmtoll TIMER_CONF VBIAS_PRECH_DELAY LL_ADC_GetVbiasPrechargeDelay
3849 * @param ADCx ADC instance
3850 * @retval Returned value is a 8-bit value.
3851 */
LL_ADC_GetVbiasPrechargeDelay(const ADC_TypeDef * ADCx)3852 __STATIC_INLINE uint32_t LL_ADC_GetVbiasPrechargeDelay(const ADC_TypeDef *ADCx)
3853 {
3854 return (uint32_t)(READ_BIT(ADCx->TIMER_CONF, ADC_TIMER_CONF_VBIAS_PRECH_DELAY));
3855 }
3856
3857 /**
3858 * @brief Enable the 1024x prescaler used to compute the duration of VBIAS
3859 * precharge duration
3860 * @note The time unit is 4 us with prescaler disabled.
3861 * The time unit is 4096 us with prescaler enabled.
3862 * @rmtoll TIMER_CONF PRECH_DELAY_SEL LL_ADC_VbiasPrechargeDelayPrescalerEnable
3863 * @param ADCx ADC instance
3864 * @retval None
3865 */
LL_ADC_VbiasPrechargeDelayPrescalerEnable(ADC_TypeDef * ADCx)3866 __STATIC_INLINE void LL_ADC_VbiasPrechargeDelayPrescalerEnable(ADC_TypeDef *ADCx)
3867 {
3868 SET_BIT(ADCx->TIMER_CONF, ADC_TIMER_CONF_PRECH_DELAY_SEL);
3869 }
3870
3871 /**
3872 * @brief Enable the 1024x prescaler used to compute the duration of VBIAS
3873 * precharge duration
3874 * @note The time unit is 4 us with prescaler disabled.
3875 * The time unit is 4096 us with prescaler enabled.
3876 * @rmtoll TIMER_CONF PRECH_DELAY_SEL LL_ADC_VbiasPrechargeDelayPrescalerDisable
3877 * @param ADCx ADC instance
3878 * @retval None
3879 */
LL_ADC_VbiasPrechargeDelayPrescalerDisable(ADC_TypeDef * ADCx)3880 __STATIC_INLINE void LL_ADC_VbiasPrechargeDelayPrescalerDisable(ADC_TypeDef *ADCx)
3881 {
3882 CLEAR_BIT(ADCx->TIMER_CONF, ADC_TIMER_CONF_PRECH_DELAY_SEL);
3883 }
3884
3885 #endif /* ADC_TIMER_CONF_VBIAS_PRECH_DELAY */
3886
3887 #if defined (ADC_TIMER_CONF_ADC_LDO_DELAY)
3888 /**
3889 * @brief Set the duration of the waiting time between the ADC_LDO enable and
3890 * the ADC_ON, to let time to the LDO to stabilize itself before
3891 * starting a conversion
3892 * The time unit is 4 us. Max delay is 1.02 ms, default value is 160 us.
3893 * @rmtoll TIMER_CONF ADC_LDO_DELAY LL_ADC_SetADCLDODelay
3894 * @param ADCx ADC instance
3895 * @param Delay This parameter is a 8-bit value.
3896 * @retval None
3897 */
LL_ADC_SetADCLDODelay(ADC_TypeDef * ADCx,uint32_t Delay)3898 __STATIC_INLINE void LL_ADC_SetADCLDODelay(ADC_TypeDef *ADCx, uint32_t Delay)
3899 {
3900 MODIFY_REG(ADCx->TIMER_CONF, ADC_TIMER_CONF_ADC_LDO_DELAY, Delay);
3901 }
3902
3903
3904 /**
3905 * @brief Get the duration of the waiting time between the ADC_LDO enable and
3906 * the ADC_ON, to let time to the LDO to stabilize itself before
3907 * starting a conversion
3908 * The time unit is 4 us. Max delay is 1.02 ms, default value is 160 us.
3909 * @rmtoll TIMER_CONF ADC_LDO_DELAY LL_ADC_GetADCLDODelay
3910 * @param ADCx ADC instance
3911 * @retval Returned value is a 8-bit value.
3912 */
LL_ADC_GetADCLDODelay(const ADC_TypeDef * ADCx)3913 __STATIC_INLINE uint32_t LL_ADC_GetADCLDODelay(const ADC_TypeDef *ADCx)
3914 {
3915 return (uint32_t)(READ_BIT(ADCx->TIMER_CONF, ADC_TIMER_CONF_ADC_LDO_DELAY));
3916 }
3917 #endif /* ADC_TIMER_CONF_ADC_LDO_DELAY */
3918
3919
3920 /**
3921 * @}
3922 */
3923
3924
3925 /** @defgroup ADC_LL_CALIB_CONVERSION ADC Calibration and Conversion functions
3926 * @{
3927 */
3928
3929
3930 /**
3931 * @brief Return the calibration value for the gain of
3932 * single ended positive input at range 3.6 V.
3933 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
3934 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
3935 */
LL_ADC_GET_CALIB_GAIN_FOR_VINPX_3V6(void)3936 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINPX_3V6(void)
3937 {
3938 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINPX_3V6) & 0xFFFUL);
3939 }
3940
3941
3942 /**
3943 * @brief Return the calibration value for the offset of
3944 * single ended positive input at range 3.6 V.
3945 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
3946 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
3947 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINPX_3V6(void)3948 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINPX_3V6(void)
3949 {
3950 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINPX_3V6) >> 12UL);
3951
3952 #if defined(STM32WB07) || defined(STM32WB06)
3953 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
3954 {
3955 /* Negative number on 7-bit */
3956 if ((calibration_offset & 0x40U) == 0x40U)
3957 {
3958 return (int8_t)(calibration_offset | 0x80U);
3959 }
3960 }
3961 #endif /* defined(STM32WB07) || defined(STM32WB06) */
3962
3963 return (int8_t)calibration_offset;
3964 }
3965
3966
3967 /**
3968 * @brief Return the calibration value for the gain of
3969 * single ended positive input at range 2.4 V.
3970 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
3971 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
3972 */
LL_ADC_GET_CALIB_GAIN_FOR_VINPX_2V4(void)3973 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINPX_2V4(void)
3974 {
3975 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINPX_2V4) & 0xFFFUL);
3976 }
3977
3978
3979 /**
3980 * @brief Return the calibration value for the offset of
3981 * single ended positive input at range 2.4 V.
3982 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
3983 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
3984 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINPX_2V4(void)3985 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINPX_2V4(void)
3986 {
3987 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINPX_2V4) >> 12UL);
3988
3989 #if defined(STM32WB07) || defined(STM32WB06)
3990 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
3991 {
3992 /* Negative number on 7-bit */
3993 if ((calibration_offset & 0x40U) == 0x40U)
3994 {
3995 return (int8_t)(calibration_offset | 0x80U);
3996 }
3997 }
3998 #endif /* defined(STM32WB07) || defined(STM32WB06) */
3999
4000 return (int8_t)calibration_offset;
4001 }
4002
4003
4004 /**
4005 * @brief Return the calibration value for the gain of
4006 * single ended positive input at range 1.2 V.
4007 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4008 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4009 */
LL_ADC_GET_CALIB_GAIN_FOR_VINPX_1V2(void)4010 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINPX_1V2(void)
4011 {
4012 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINPX_1V2) & 0xFFFUL);
4013 }
4014
4015
4016 /**
4017 * @brief Return the calibration value for the offset of
4018 * single ended positive input at range 1.2 V.
4019 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4020 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4021 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINPX_1V2(void)4022 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINPX_1V2(void)
4023 {
4024 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINPX_1V2) >> 12UL);
4025
4026 #if defined(STM32WB07) || defined(STM32WB06)
4027 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4028 {
4029 /* Negative number on 7-bit */
4030 if ((calibration_offset & 0x40U) == 0x40U)
4031 {
4032 return (int8_t)(calibration_offset | 0x80U);
4033 }
4034 }
4035 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4036
4037 return (int8_t)calibration_offset;
4038 }
4039
4040
4041 /**
4042 * @brief Return the calibration value for the gain of
4043 * single ended negative input at range 3.6 V.
4044 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4045 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4046 */
LL_ADC_GET_CALIB_GAIN_FOR_VINMX_3V6(void)4047 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINMX_3V6(void)
4048 {
4049 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINMX_3V6) & 0xFFFUL);
4050 }
4051
4052
4053 /**
4054 * @brief Return the calibration value for the offset of
4055 * single ended negative input at range 3.6 V.
4056 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4057 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4058 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINMX_3V6(void)4059 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINMX_3V6(void)
4060 {
4061 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINMX_3V6) >> 12UL);
4062
4063 #if defined(STM32WB07) || defined(STM32WB06)
4064 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4065 {
4066 /* Negative number on 7-bit */
4067 if ((calibration_offset & 0x40U) == 0x40U)
4068 {
4069 return - (int8_t)(calibration_offset | 0x80U);
4070 }
4071 }
4072 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4073
4074 return - (int8_t)calibration_offset;
4075 }
4076
4077 /**
4078 * @brief Return the calibration value for the gain of
4079 * single ended negative input at range 2.4 V.
4080 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4081 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4082 */
LL_ADC_GET_CALIB_GAIN_FOR_VINMX_2V4(void)4083 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINMX_2V4(void)
4084 {
4085 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINMX_2V4) & 0xFFFUL);
4086 }
4087
4088
4089 /**
4090 * @brief Return the calibration value for the offset of
4091 * single ended negative input at range 2.4 V.
4092 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4093 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4094 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINMX_2V4(void)4095 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINMX_2V4(void)
4096 {
4097 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINMX_2V4) >> 12UL);
4098
4099 #if defined(STM32WB07) || defined(STM32WB06)
4100 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4101 {
4102 /* Negative number on 7-bit */
4103 if ((calibration_offset & 0x40U) == 0x40U)
4104 {
4105 return - (int8_t)(calibration_offset | 0x80U);
4106 }
4107 }
4108 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4109
4110 return - (int8_t)calibration_offset;
4111 }
4112
4113
4114 /**
4115 * @brief Return the calibration value for the gain of
4116 * single ended negative input at range 1.2 V.
4117 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4118 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4119 */
LL_ADC_GET_CALIB_GAIN_FOR_VINMX_1V2(void)4120 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINMX_1V2(void)
4121 {
4122 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINMX_1V2) & 0xFFFUL);
4123 }
4124
4125
4126 /**
4127 * @brief Return the calibration value for the offset of
4128 * single ended negative input at range 1.2 V.
4129 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4130 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4131 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINMX_1V2(void)4132 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINMX_1V2(void)
4133 {
4134 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINMX_1V2) >> 12UL);
4135
4136 #if defined(STM32WB07) || defined(STM32WB06)
4137 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4138 {
4139 /* Negative number on 7-bit */
4140 if ((calibration_offset & 0x40U) == 0x40U)
4141 {
4142 return - (int8_t)(calibration_offset | 0x80U);
4143 }
4144 }
4145 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4146
4147 return - (int8_t)calibration_offset;
4148 }
4149
4150
4151 /**
4152 * @brief Return the calibration value for the gain of
4153 * differential input at range 3.6 V.
4154 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4155 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4156 */
LL_ADC_GET_CALIB_GAIN_FOR_VINDIFF_3V6(void)4157 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINDIFF_3V6(void)
4158 {
4159 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINDIFF_3V6) & 0xFFFUL);
4160 }
4161
4162
4163 /**
4164 * @brief Return the calibration value for the offset of
4165 * differential input at range 3.6 V.
4166 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4167 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4168 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINDIFF_3V6(void)4169 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINDIFF_3V6(void)
4170 {
4171 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINDIFF_3V6) >> 12UL);
4172
4173 #if defined(STM32WB07) || defined(STM32WB06)
4174 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4175 {
4176 /* Negative number on 7-bit */
4177 if ((calibration_offset & 0x40U) == 0x40U)
4178 {
4179 return (int8_t)(calibration_offset | 0x80U);
4180 }
4181 }
4182 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4183
4184 return ((int8_t)calibration_offset);
4185 }
4186
4187 /**
4188 * @brief Return the calibration value for the gain of
4189 * differential input at range 2.4 V.
4190 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4191 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4192 */
LL_ADC_GET_CALIB_GAIN_FOR_VINDIFF_2V4(void)4193 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINDIFF_2V4(void)
4194 {
4195 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINDIFF_2V4) & 0xFFFUL);
4196 }
4197
4198
4199 /**
4200 * @brief Return the calibration value for the offset of
4201 * differential input at range 2.4 V.
4202 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4203 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4204 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINDIFF_2V4(void)4205 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINDIFF_2V4(void)
4206 {
4207 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINDIFF_2V4) >> 12UL);
4208
4209 #if defined(STM32WB07) || defined(STM32WB06)
4210 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4211 {
4212 /* Negative number on 7-bit */
4213 if ((calibration_offset & 0x40U) == 0x40U)
4214 {
4215 return (int8_t)(calibration_offset | 0x80U);
4216 }
4217 }
4218 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4219
4220 return ((int8_t)calibration_offset);
4221 }
4222
4223
4224 /**
4225 * @brief Return the calibration value for the gain of
4226 * differential input at range 1.2 V.
4227 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4228 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4229 */
LL_ADC_GET_CALIB_GAIN_FOR_VINDIFF_1V2(void)4230 __STATIC_INLINE uint16_t LL_ADC_GET_CALIB_GAIN_FOR_VINDIFF_1V2(void)
4231 {
4232 return (uint16_t)((*(uint32_t *)ADC_CALIB_ADDRESS_VINDIFF_1V2) & 0xFFFUL);
4233 }
4234
4235
4236 /**
4237 * @brief Return the calibration value for the offset of
4238 * differential input at range 1.2 V.
4239 * Use the function LL_ADC_ConfigureCalibPointX() with X = 1, 2, 3 or 4.
4240 * @retval Returned value to be put in COMP_X register if 0xFFFFFFFF means no calibration point.
4241 */
LL_ADC_GET_CALIB_OFFSET_FOR_VINDIFF_1V2(void)4242 __STATIC_INLINE int8_t LL_ADC_GET_CALIB_OFFSET_FOR_VINDIFF_1V2(void)
4243 {
4244 int8_t calibration_offset = ((*(uint32_t *)ADC_CALIB_ADDRESS_VINDIFF_1V2) >> 12UL);
4245
4246 #if defined(STM32WB07) || defined(STM32WB06)
4247 if (*(uint32_t *)ADC_LAYOUT_ID == 0UL) /* Memory version 1 */
4248 {
4249 /* Negative number on 7-bit */
4250 if ((calibration_offset & 0x40U) == 0x40U)
4251 {
4252 return (int8_t)(calibration_offset | 0x80U);
4253 }
4254 }
4255 #endif /* defined(STM32WB07) || defined(STM32WB06) */
4256
4257 return ((int8_t)calibration_offset);
4258 }
4259
4260 /**
4261 * @}
4262 */
4263
4264
4265 #if defined(USE_FULL_LL_DRIVER)
4266 /** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
4267 * @{
4268 */
4269
4270 /* De-initialization of ADC instance */
4271 ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
4272
4273 /* Initialization of ADC instance */
4274 ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, const LL_ADC_InitTypeDef *pADC_InitStruct);
4275
4276 /* Initialization of some features of ADC instance */
4277 ErrorStatus LL_ADC_VoltageRangeInit(ADC_TypeDef *ADCx, const LL_ADC_VoltRangeInitTypeDef *pVoltRange_InitStruct);
4278 ErrorStatus LL_ADC_SequenceInit(ADC_TypeDef *ADCx, const LL_ADC_SequenceInitTypeDef *pSequence_InitStruct);
4279
4280 /**
4281 * @}
4282 */
4283 #endif /* USE_FULL_LL_DRIVER */
4284
4285 /**
4286 * @}
4287 */
4288
4289 /**
4290 * @}
4291 */
4292
4293 #endif /* ADC1 */
4294
4295 /**
4296 * @}
4297 */
4298
4299 #ifdef __cplusplus
4300 }
4301 #endif /* __cplusplus */
4302
4303 #endif /* STM32WB0x_LL_ADC_H */
4304
