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Searched refs:LIFCR (Results 1 – 25 of 102) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h2081 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0); in LL_DMA_ClearFlag_HT0()
2092 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); in LL_DMA_ClearFlag_HT1()
2103 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2); in LL_DMA_ClearFlag_HT2()
2114 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); in LL_DMA_ClearFlag_HT3()
2169 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); in LL_DMA_ClearFlag_TC0()
2180 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2191 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2202 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
2257 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0); in LL_DMA_ClearFlag_TE0()
2268 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF1); in LL_DMA_ClearFlag_TE1()
[all …]
Dstm32f2xx_hal_dma.h551 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
552 …E__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h2114 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0); in LL_DMA_ClearFlag_HT0()
2125 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); in LL_DMA_ClearFlag_HT1()
2136 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2); in LL_DMA_ClearFlag_HT2()
2147 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); in LL_DMA_ClearFlag_HT3()
2202 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); in LL_DMA_ClearFlag_TC0()
2213 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2224 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2235 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
2290 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0); in LL_DMA_ClearFlag_TE0()
2301 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF1); in LL_DMA_ClearFlag_TE1()
[all …]
Dstm32f7xx_hal_dma.h535 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
536 …E__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h2091 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0); in LL_DMA_ClearFlag_HT0()
2102 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); in LL_DMA_ClearFlag_HT1()
2113 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2); in LL_DMA_ClearFlag_HT2()
2124 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); in LL_DMA_ClearFlag_HT3()
2179 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); in LL_DMA_ClearFlag_TC0()
2190 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2201 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2212 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
2267 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0); in LL_DMA_ClearFlag_TE0()
2278 WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF1); in LL_DMA_ClearFlag_TE1()
[all …]
Dstm32f4xx_hal_dma.h561 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
562 …E__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dma.h2372 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF0); in LL_DMA_ClearFlag_HT0()
2383 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF1); in LL_DMA_ClearFlag_HT1()
2394 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF2); in LL_DMA_ClearFlag_HT2()
2405 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF3); in LL_DMA_ClearFlag_HT3()
2460 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF0); in LL_DMA_ClearFlag_TC0()
2471 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2482 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2493 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
2548 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTEIF0); in LL_DMA_ClearFlag_TE0()
2559 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTEIF1); in LL_DMA_ClearFlag_TE1()
[all …]
Dstm32mp1xx_hal_dma.h740 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
741 …E__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma.h2515 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF0); in LL_DMA_ClearFlag_HT0()
2526 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF1); in LL_DMA_ClearFlag_HT1()
2537 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF2); in LL_DMA_ClearFlag_HT2()
2548 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CHTIF3); in LL_DMA_ClearFlag_HT3()
2603 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF0); in LL_DMA_ClearFlag_TC0()
2614 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2625 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2636 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
2691 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTEIF0); in LL_DMA_ClearFlag_TE0()
2702 WRITE_REG(DMAx->LIFCR, DMA_LIFCR_CTEIF1); in LL_DMA_ClearFlag_TE1()
[all …]
Dstm32h7xx_hal_dma.h1050 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
1051 …__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
1056 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
1057 …E__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_dma.c220 DMAx->LIFCR = 0x0000003F ; in LL_DMA_DeInit()
225 DMAx->LIFCR = 0x00000F40 ; in LL_DMA_DeInit()
230 DMAx->LIFCR = 0x003F0000 ; in LL_DMA_DeInit()
235 DMAx->LIFCR = 0x0F400000 ; in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_dma.c218 DMAx->LIFCR = 0x0000003FU; in LL_DMA_DeInit()
223 DMAx->LIFCR = 0x00000F40U; in LL_DMA_DeInit()
228 DMAx->LIFCR = 0x003F0000U; in LL_DMA_DeInit()
233 DMAx->LIFCR = 0x0F400000U; in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_dma.c211 DMAx->LIFCR = 0x0000003FU; in LL_DMA_DeInit()
216 DMAx->LIFCR = 0x00000F40U; in LL_DMA_DeInit()
221 DMAx->LIFCR = 0x003F0000U; in LL_DMA_DeInit()
226 DMAx->LIFCR = 0x0F400000U; in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_dma.c239 DMAx->LIFCR = 0x0000003FU; in LL_DMA_DeInit()
244 DMAx->LIFCR = 0x00000F40U; in LL_DMA_DeInit()
249 DMAx->LIFCR = 0x003F0000U; in LL_DMA_DeInit()
254 DMAx->LIFCR = 0x0F400000U; in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_dma.c223 DMAx->LIFCR = 0x0000003FU; in LL_DMA_DeInit()
228 DMAx->LIFCR = 0x00000F40U; in LL_DMA_DeInit()
233 DMAx->LIFCR = 0x003F0000U; in LL_DMA_DeInit()
238 DMAx->LIFCR = 0x0F400000U; in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h245 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f410rx.h245 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f410tx.h242 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f401xc.h227 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f401xe.h227 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f411xe.h228 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f405xx.h338 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f412cx.h348 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h336 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member
Dstm32f205xx.h335 __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */ member

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