| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/ |
| D | stm32l0xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/ |
| D | stm32f0xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/ |
| D | stm32c0xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
| D | stm32f7xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/ |
| D | stm32wb0x_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
| D | stm32f3xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
300 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
313 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
370 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
395 …return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL :… in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
| D | stm32u0xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
370 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
395 …return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL :… in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
370 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
395 …return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL :… in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
370 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
395 …return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL :… in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
370 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
395 …return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL :… in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_iwdg.h | 69 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog coun…
370 return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_WVU()
395 …return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL :… in LL_IWDG_IsReady()
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| /hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/ |
| D | stm32wb0x_hal_iwdg.c | 130 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
| D | stm32l5xx_hal_iwdg.c | 129 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
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| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/ |
| D | stm32wlxx_hal_iwdg.c | 130 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/ |
| D | stm32wbxx_hal_iwdg.c | 130 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
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| /hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/ |
| D | stm32c0xx_hal_iwdg.c | 130 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/ |
| D | stm32g0xx_hal_iwdg.c | 130 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
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