/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/ |
D | stm32mp1xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4721 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5356 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 6564 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6615 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_MDMAMasterTransmitCplt() 6723 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 6774 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_MDMAMasterReceiveCplt() 7353 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7385 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7445 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/ |
D | stm32wlxx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4412 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5184 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5323 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6449 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6527 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7004 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7042 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7102 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/ |
D | stm32l0xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4480 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5252 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5391 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6536 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6616 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7122 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7155 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7221 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/ |
D | stm32u0xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4554 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5332 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5471 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6691 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6771 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7289 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7323 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7390 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/ |
D | stm32wbxx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4634 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5417 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5556 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6776 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6856 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7372 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7406 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7473 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/ |
D | stm32f3xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4612 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5418 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5565 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6791 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6871 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7392 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7425 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7491 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/ |
D | stm32f0xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4612 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5418 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5565 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6791 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6871 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7392 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7425 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7491 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/ |
D | stm32c0xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4634 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5417 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5556 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6776 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6856 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7372 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7406 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7473 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/ |
D | stm32g0xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4598 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5380 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5519 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6729 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6809 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7322 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7355 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7421 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/ |
D | stm32wb0x_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4634 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5417 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5556 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6776 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6856 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7372 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7406 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7473 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4641 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5423 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5562 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6772 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6852 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7388 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7421 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7487 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4612 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5418 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5565 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6791 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6871 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7392 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7425 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7491 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4612 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5394 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5533 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6743 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6823 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7336 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7369 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7435 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4612 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5394 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5533 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6743 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6823 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7336 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7369 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7435 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/ |
D | stm32wbaxx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4927 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5705 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5844 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 7065 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 7172 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7716 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7750 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7817 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4927 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5705 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5844 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 7065 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 7172 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7716 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7750 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7817 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4612 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5418 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5565 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 6791 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 6871 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7413 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7446 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7512 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
D | stm32n6xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4893 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5671 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5810 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 7031 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 7138 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7682 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7716 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7783 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
D | stm32h7rsxx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4864 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5642 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5781 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 7002 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 7109 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7651 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7685 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7752 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_hal_i2c.c | 394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro 4893 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT() 5671 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA() 5810 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA() 7031 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt() 7138 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt() 7682 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7716 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ() 7783 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
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