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Searched refs:HSEM_CR_COREID_Pos (Results 1 – 25 of 63) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_hsem.c238 HSEM->CR = ((Key << HSEM_CR_KEY_Pos) | (CoreID << HSEM_CR_COREID_Pos)); in HAL_HSEM_ReleaseAll()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_hsem.c238 HSEM->CR = ((Key << HSEM_CR_KEY_Pos) | (CoreID << HSEM_CR_COREID_Pos)); in HAL_HSEM_ReleaseAll()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_hsem.c251 HSEM->CR = ((Key << HSEM_CR_KEY_Pos) | (CoreID << HSEM_CR_COREID_Pos)); in HAL_HSEM_ReleaseAll()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_hsem.c263 HSEM->CR = ((Key << HSEM_CR_KEY_Pos) | (CoreID << HSEM_CR_COREID_Pos)); in HAL_HSEM_ReleaseAll()
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5030 #define HSEM_CR_COREID_Pos (8U) macro
5031 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5033 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5034 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wle5xx.h5030 #define HSEM_CR_COREID_Pos (8U) macro
5031 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5033 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5034 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wl5mxx.h5794 #define HSEM_CR_COREID_Pos (8U) macro
5795 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5797 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5798 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wl54xx.h5794 #define HSEM_CR_COREID_Pos (8U) macro
5795 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5797 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5798 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wl55xx.h5794 #define HSEM_CR_COREID_Pos (8U) macro
5795 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5797 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5798 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h5490 #define HSEM_CR_COREID_Pos (8U) macro
5491 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5493 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5494 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wb1mxx.h5149 #define HSEM_CR_COREID_Pos (8U) macro
5150 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5152 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5153 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wb30xx.h5489 #define HSEM_CR_COREID_Pos (8U) macro
5490 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5492 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5493 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wb35xx.h5867 #define HSEM_CR_COREID_Pos (8U) macro
5868 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5870 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5871 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wb55xx.h5919 #define HSEM_CR_COREID_Pos (8U) macro
5920 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5922 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5923 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wb5mxx.h5919 #define HSEM_CR_COREID_Pos (8U) macro
5920 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5922 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5923 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h5053 #define HSEM_CR_COREID_Pos (8U) macro
5054 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5056 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5057 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
Dstm32wb15xx.h5149 #define HSEM_CR_COREID_Pos (8U) macro
5150 #define HSEM_CR_COREID_Msk (0xFUL << HSEM_CR_COREID_Pos) /*!< 0x00000F00 */
5152 #define HSEM_CR_COREID_CPU1 (0x4U << HSEM_CR_COREID_Pos)
5153 #define HSEM_CR_COREID_CPU2 (0x8U << HSEM_CR_COREID_Pos)
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h13292 #define HSEM_CR_COREID_Pos (8U) macro
13293 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
26780 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26781 #define HSEM_CR_COREID_CPU2 (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
26783 #define HSEM_CR_COREID_CURRENT (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
26785 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h745xg.h13292 #define HSEM_CR_COREID_Pos (8U) macro
13293 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
26780 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26781 #define HSEM_CR_COREID_CPU2 (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
26783 #define HSEM_CR_COREID_CURRENT (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
26785 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h755xx.h13485 #define HSEM_CR_COREID_Pos (8U) macro
13486 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
27067 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
27068 #define HSEM_CR_COREID_CPU2 (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
27070 #define HSEM_CR_COREID_CURRENT (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
27072 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h757xx.h16642 #define HSEM_CR_COREID_Pos (8U) macro
16643 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
30240 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
30241 #define HSEM_CR_COREID_CPU2 (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
30243 #define HSEM_CR_COREID_CURRENT (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
30245 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h747xg.h16449 #define HSEM_CR_COREID_Pos (8U) macro
16450 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
29953 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
29954 #define HSEM_CR_COREID_CPU2 (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
29956 #define HSEM_CR_COREID_CURRENT (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
29958 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h747xx.h16449 #define HSEM_CR_COREID_Pos (8U) macro
16450 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
29953 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
29954 #define HSEM_CR_COREID_CPU2 (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
29956 #define HSEM_CR_COREID_CURRENT (HSEM_CPU2_COREID << HSEM_CR_COREID_Pos)
29958 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7a3xx.h10871 #define HSEM_CR_COREID_Pos (8U) macro
10872 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
21930 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
21931 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7b0xx.h11118 #define HSEM_CR_COREID_Pos (8U) macro
11119 #define HSEM_CR_COREID_Msk (0xFFUL << HSEM_CR_COREID_Pos) /*!< 0x0000FF00 */
22414 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
22415 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)

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