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Searched refs:HSEM_CPU1_COREID (Results 1 – 25 of 65) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_hsem.c321 if (HAL_GetCurrentCPUID() == HSEM_CPU1_COREID) in HAL_HSEM_ActivateNotification()
345 if (HAL_GetCurrentCPUID() == HSEM_CPU1_COREID) in HAL_HSEM_DeactivateNotification()
368 if (HAL_GetCurrentCPUID() == HSEM_CPU1_COREID) in HAL_HSEM_IRQHandler()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_hsem.c333 if (HAL_GetCurrentCPUID() == HSEM_CPU1_COREID) in HAL_HSEM_ActivateNotification()
357 if (HAL_GetCurrentCPUID() == HSEM_CPU1_COREID) in HAL_HSEM_DeactivateNotification()
380 if (HAL_GetCurrentCPUID() == HSEM_CPU1_COREID) in HAL_HSEM_IRQHandler()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_hsem.h188 #define IS_HSEM_COREID(__COREID__) (((__COREID__) == HSEM_CPU1_COREID) || \
191 #define IS_HSEM_COREID(__COREID__) ((__COREID__) == HSEM_CPU1_COREID)
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_hsem.h187 #define IS_HSEM_COREID(__COREID__) (((__COREID__) == HSEM_CPU1_COREID) || \
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_hsem.h187 #define IS_HSEM_COREID(__COREID__) (((__COREID__) == HSEM_CPU1_COREID) || \
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_hsem.h187 #define IS_HSEM_COREID(__COREID__) (((__COREID__) == HSEM_CPU1_COREID) || \
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h21929 #define HSEM_CPU1_COREID (0x00000001U) /* Semaphore Core CM7 ID */ macro
21930 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
21931 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7b0xx.h22413 #define HSEM_CPU1_COREID (0x00000001U) /* Semaphore Core CM7 ID */ macro
22414 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
22415 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7b0xxq.h22425 #define HSEM_CPU1_COREID (0x00000001U) /* Semaphore Core CM7 ID */ macro
22426 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
22427 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7a3xxq.h21941 #define HSEM_CPU1_COREID (0x00000001U) /* Semaphore Core CM7 ID */ macro
21942 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
21943 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7b3xx.h22420 #define HSEM_CPU1_COREID (0x00000001U) /* Semaphore Core CM7 ID */ macro
22421 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
22422 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h7b3xxq.h22432 #define HSEM_CPU1_COREID (0x00000001U) /* Semaphore Core CM7 ID */ macro
22433 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
22434 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h730xxq.h24140 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
24141 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
24142 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h733xx.h24128 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
24129 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
24130 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h725xx.h23649 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
23650 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
23651 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h730xx.h24128 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
24129 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
24130 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h735xx.h24140 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
24141 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
24142 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h742xx.h25356 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
25357 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
25358 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h723xx.h23637 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
23638 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
23639 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h750xx.h26285 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
26286 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26287 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h753xx.h26291 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
26292 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26293 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h745xx.h26778 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
26780 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26785 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h745xg.h26778 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
26780 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26785 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h743xx.h26004 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
26005 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
26006 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
Dstm32h755xx.h27065 #define HSEM_CPU1_COREID (0x00000003U) /* Semaphore Core CM7 ID */ macro
27067 #define HSEM_CR_COREID_CPU1 (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)
27072 #define HSEM_CR_COREID_CURRENT (HSEM_CPU1_COREID << HSEM_CR_COREID_Pos)

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