/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
D | stm32f2xx_ll_dma.h | 2125 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF4); in LL_DMA_ClearFlag_HT4() 2136 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF5); in LL_DMA_ClearFlag_HT5() 2147 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); in LL_DMA_ClearFlag_HT6() 2158 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7); in LL_DMA_ClearFlag_HT7() 2213 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4); in LL_DMA_ClearFlag_TC4() 2224 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5); in LL_DMA_ClearFlag_TC5() 2235 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6); in LL_DMA_ClearFlag_TC6() 2246 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); in LL_DMA_ClearFlag_TC7() 2301 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF4); in LL_DMA_ClearFlag_TE4() 2312 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5); in LL_DMA_ClearFlag_TE5() [all …]
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D | stm32f2xx_hal_dma.h | 550 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\ 552 …((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1-…
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_ll_dma.h | 2158 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF4); in LL_DMA_ClearFlag_HT4() 2169 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF5); in LL_DMA_ClearFlag_HT5() 2180 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); in LL_DMA_ClearFlag_HT6() 2191 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7); in LL_DMA_ClearFlag_HT7() 2246 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4); in LL_DMA_ClearFlag_TC4() 2257 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5); in LL_DMA_ClearFlag_TC5() 2268 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6); in LL_DMA_ClearFlag_TC6() 2279 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); in LL_DMA_ClearFlag_TC7() 2334 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF4); in LL_DMA_ClearFlag_TE4() 2345 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5); in LL_DMA_ClearFlag_TE5() [all …]
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D | stm32f7xx_hal_dma.h | 534 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\ 536 …((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1-…
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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_ll_dma.h | 2135 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF4); in LL_DMA_ClearFlag_HT4() 2146 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF5); in LL_DMA_ClearFlag_HT5() 2157 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); in LL_DMA_ClearFlag_HT6() 2168 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7); in LL_DMA_ClearFlag_HT7() 2223 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4); in LL_DMA_ClearFlag_TC4() 2234 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5); in LL_DMA_ClearFlag_TC5() 2245 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6); in LL_DMA_ClearFlag_TC6() 2256 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); in LL_DMA_ClearFlag_TC7() 2311 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF4); in LL_DMA_ClearFlag_TE4() 2322 WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5); in LL_DMA_ClearFlag_TE5() [all …]
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D | stm32f4xx_hal_dma.h | 560 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\ 562 …((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1-…
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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_ll_dma.h | 2416 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF4); in LL_DMA_ClearFlag_HT4() 2427 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF5); in LL_DMA_ClearFlag_HT5() 2438 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF6); in LL_DMA_ClearFlag_HT6() 2449 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF7); in LL_DMA_ClearFlag_HT7() 2504 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF4); in LL_DMA_ClearFlag_TC4() 2515 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF5); in LL_DMA_ClearFlag_TC5() 2526 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF6); in LL_DMA_ClearFlag_TC6() 2537 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF7); in LL_DMA_ClearFlag_TC7() 2592 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTEIF4); in LL_DMA_ClearFlag_TE4() 2603 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTEIF5); in LL_DMA_ClearFlag_TE5() [all …]
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D | stm32mp1xx_hal_dma.h | 739 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\ 741 …((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1-…
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_ll_dma.h | 2559 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF4); in LL_DMA_ClearFlag_HT4() 2570 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF5); in LL_DMA_ClearFlag_HT5() 2581 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF6); in LL_DMA_ClearFlag_HT6() 2592 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CHTIF7); in LL_DMA_ClearFlag_HT7() 2647 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF4); in LL_DMA_ClearFlag_TC4() 2658 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF5); in LL_DMA_ClearFlag_TC5() 2669 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF6); in LL_DMA_ClearFlag_TC6() 2680 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTCIF7); in LL_DMA_ClearFlag_TC7() 2735 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTEIF4); in LL_DMA_ClearFlag_TE4() 2746 WRITE_REG(DMAx->HIFCR, DMA_HIFCR_CTEIF5); in LL_DMA_ClearFlag_TE5() [all …]
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D | stm32h7xx_hal_dma.h | 1049 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\ 1051 …((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1… 1055 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\ 1057 …((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1-…
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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/ |
D | stm32f2xx_ll_dma.c | 240 DMAx->HIFCR = 0x0000003F ; in LL_DMA_DeInit() 245 DMAx->HIFCR = 0x00000F40 ; in LL_DMA_DeInit() 250 DMAx->HIFCR = 0x003F0000 ; in LL_DMA_DeInit() 255 DMAx->HIFCR = 0x0F400000 ; in LL_DMA_DeInit()
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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_ll_dma.c | 238 DMAx->HIFCR = 0x0000003FU; in LL_DMA_DeInit() 243 DMAx->HIFCR = 0x00000F40U; in LL_DMA_DeInit() 248 DMAx->HIFCR = 0x003F0000U; in LL_DMA_DeInit() 253 DMAx->HIFCR = 0x0F400000U; in LL_DMA_DeInit()
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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/ |
D | stm32mp1xx_ll_dma.c | 231 DMAx->HIFCR = 0x0000003FU; in LL_DMA_DeInit() 236 DMAx->HIFCR = 0x00000F40U; in LL_DMA_DeInit() 241 DMAx->HIFCR = 0x003F0000U; in LL_DMA_DeInit() 246 DMAx->HIFCR = 0x0F400000U; in LL_DMA_DeInit()
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_ll_dma.c | 259 DMAx->HIFCR = 0x0000003FU; in LL_DMA_DeInit() 264 DMAx->HIFCR = 0x00000F40U; in LL_DMA_DeInit() 269 DMAx->HIFCR = 0x003F0000U; in LL_DMA_DeInit() 274 DMAx->HIFCR = 0x0F400000U; in LL_DMA_DeInit()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_ll_dma.c | 243 DMAx->HIFCR = 0x0000003FU; in LL_DMA_DeInit() 248 DMAx->HIFCR = 0x00000F40U; in LL_DMA_DeInit() 253 DMAx->HIFCR = 0x003F0000U; in LL_DMA_DeInit() 258 DMAx->HIFCR = 0x0F400000U; in LL_DMA_DeInit()
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/hal_stm32-latest/stm32cube/stm32f4xx/soc/ |
D | stm32f410cx.h | 246 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f410rx.h | 246 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f410tx.h | 243 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f401xc.h | 228 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f401xe.h | 228 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f411xe.h | 229 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f405xx.h | 339 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f412cx.h | 349 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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/hal_stm32-latest/stm32cube/stm32f2xx/soc/ |
D | stm32f215xx.h | 337 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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D | stm32f205xx.h | 336 __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */ member
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