Searched refs:HAL_I2S_STATE_BUSY_TX_RX (Results 1 – 14 of 14) sorted by relevance
249 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive()483 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_IT()593 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_DMA()
1383 else if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAPause()1423 else if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAResume()1515 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAStop()1569 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAStop()
1409 else if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAPause()1449 else if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAResume()1541 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAStop()1595 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_DMAStop()
1078 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive()1362 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_IT()1616 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_DMA()2013 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_IRQHandler()
1080 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive()1364 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_IT()1704 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_DMA()2086 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_IRQHandler()
1075 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive()1359 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_IT()1699 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_DMA()2182 if (hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) in HAL_I2S_IRQHandler()
1059 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive()1333 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_IT()1688 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; in HAL_I2SEx_TransmitReceive_DMA()
83 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ enumerator
90 HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, /*!< Data Transmission and Reception process is ongoing */ enumerator
82 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ enumerator