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Searched refs:GPIO_DELAYRL_DLY1_Pos (Results 1 – 6 of 6) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_gpio.h905 MODIFY_REG(GPIOx->DELAYR[0], GPIO_DELAYRL_DLY0 << (POSITION_VAL(Pin) * GPIO_DELAYRL_DLY1_Pos), in LL_GPIO_SetDelayPin_0_7()
906 (Delay << (POSITION_VAL(Pin) * GPIO_DELAYRL_DLY1_Pos))); in LL_GPIO_SetDelayPin_0_7()
939 …2_t)(READ_BIT(GPIOx->DELAYR[0], (GPIO_DELAYRL_DLY0 << (POSITION_VAL(Pin) * GPIO_DELAYRL_DLY1_Pos))) in LL_GPIO_GetDelayPin_0_7()
940 >> (POSITION_VAL(Pin) * GPIO_DELAYRL_DLY1_Pos)); in LL_GPIO_GetDelayPin_0_7()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_gpio.c348 GPIOx->DELAYR[position >> 3u] &= ~(0xFu << ((position & 0x07u) * GPIO_DELAYRL_DLY1_Pos)) ; in HAL_GPIO_DeInit()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h20074 #define GPIO_DELAYRL_DLY1_Pos (4U) macro
20075 #define GPIO_DELAYRL_DLY1_Msk (0xFUL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x000000F0 */
20077 #define GPIO_DELAYRL_DLY1_0 (0x1UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000010 */
20078 #define GPIO_DELAYRL_DLY1_1 (0x2UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000020 */
20079 #define GPIO_DELAYRL_DLY1_2 (0x4UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000040 */
20080 #define GPIO_DELAYRL_DLY1_3 (0x8UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000080 */
Dstm32n657xx.h21016 #define GPIO_DELAYRL_DLY1_Pos (4U) macro
21017 #define GPIO_DELAYRL_DLY1_Msk (0xFUL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x000000F0 */
21019 #define GPIO_DELAYRL_DLY1_0 (0x1UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000010 */
21020 #define GPIO_DELAYRL_DLY1_1 (0x2UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000020 */
21021 #define GPIO_DELAYRL_DLY1_2 (0x4UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000040 */
21022 #define GPIO_DELAYRL_DLY1_3 (0x8UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000080 */
Dstm32n655xx.h20774 #define GPIO_DELAYRL_DLY1_Pos (4U) macro
20775 #define GPIO_DELAYRL_DLY1_Msk (0xFUL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x000000F0 */
20777 #define GPIO_DELAYRL_DLY1_0 (0x1UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000010 */
20778 #define GPIO_DELAYRL_DLY1_1 (0x2UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000020 */
20779 #define GPIO_DELAYRL_DLY1_2 (0x4UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000040 */
20780 #define GPIO_DELAYRL_DLY1_3 (0x8UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000080 */
Dstm32n647xx.h20316 #define GPIO_DELAYRL_DLY1_Pos (4U) macro
20317 #define GPIO_DELAYRL_DLY1_Msk (0xFUL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x000000F0 */
20319 #define GPIO_DELAYRL_DLY1_0 (0x1UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000010 */
20320 #define GPIO_DELAYRL_DLY1_1 (0x2UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000020 */
20321 #define GPIO_DELAYRL_DLY1_2 (0x4UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000040 */
20322 #define GPIO_DELAYRL_DLY1_3 (0x8UL << GPIO_DELAYRL_DLY1_Pos) /*!< 0x00000080 */