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Searched refs:FSMC_PATT3_ATTHOLD3_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_fsmc.c602 … ((Timing->HoldSetupTime) << FSMC_PATT3_ATTHOLD3_Pos) | in FSMC_NAND_AttributeSpace_Timing_Init()
610 … ((Timing->HoldSetupTime) << FSMC_PATT3_ATTHOLD3_Pos) | in FSMC_NAND_AttributeSpace_Timing_Init()
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h7712 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
7713 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
7715 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
7716 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
7717 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
7718 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
7719 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
7720 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
7721 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
7722 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
Dstm32f205xx.h7562 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
7563 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
7565 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
7566 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
7567 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
7568 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
7569 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
7570 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
7571 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
7572 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
Dstm32f207xx.h7861 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
7862 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
7864 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
7865 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
7866 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
7867 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
7868 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
7869 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
7870 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
7871 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
Dstm32f217xx.h8011 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
8012 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
8014 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
8015 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
8016 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
8017 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
8018 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
8019 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
8020 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
8021 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h7606 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
7607 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
7609 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
7610 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
7611 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
7612 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
7613 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
7614 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
7615 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
7616 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
Dstm32f415xx.h7788 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
7789 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
7791 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
7792 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
7793 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
7794 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
7795 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
7796 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
7797 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
7798 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
Dstm32f407xx.h7906 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
7907 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
7909 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
7910 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
7911 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
7912 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
7913 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
7914 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
7915 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
7916 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */
Dstm32f417xx.h8085 #define FSMC_PATT3_ATTHOLD3_Pos (16U) macro
8086 #define FSMC_PATT3_ATTHOLD3_Msk (0xFFUL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00FF0000 */
8088 #define FSMC_PATT3_ATTHOLD3_0 (0x01UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00010000 */
8089 #define FSMC_PATT3_ATTHOLD3_1 (0x02UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00020000 */
8090 #define FSMC_PATT3_ATTHOLD3_2 (0x04UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00040000 */
8091 #define FSMC_PATT3_ATTHOLD3_3 (0x08UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00080000 */
8092 #define FSMC_PATT3_ATTHOLD3_4 (0x10UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00100000 */
8093 #define FSMC_PATT3_ATTHOLD3_5 (0x20UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00200000 */
8094 #define FSMC_PATT3_ATTHOLD3_6 (0x40UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00400000 */
8095 #define FSMC_PATT3_ATTHOLD3_7 (0x80UL << FSMC_PATT3_ATTHOLD3_Pos) /*!< 0x00800000 */