Searched refs:FSMC_BWTR4_ADDHLD_Pos (Results 1 – 13 of 13) sorted by relevance
7256 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7257 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7259 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7260 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7261 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7262 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7106 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7107 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7109 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7110 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7111 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7112 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7405 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7406 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7408 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7409 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7410 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7411 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7555 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7556 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7558 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7559 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7560 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7561 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7150 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7151 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7153 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7154 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7155 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7156 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7332 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7333 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7335 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7336 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7337 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7338 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7624 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7625 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7627 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7628 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7629 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7630 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7450 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7451 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7453 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7454 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7455 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7456 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7268 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7269 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7271 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7272 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7273 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7274 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7262 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7263 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7265 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7266 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7267 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7268 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7264 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7265 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7267 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7268 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7269 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7270 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7588 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7589 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7591 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7592 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7593 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7594 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
7629 #define FSMC_BWTR4_ADDHLD_Pos (4U) macro7630 #define FSMC_BWTR4_ADDHLD_Msk (0xFUL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x000000F0 */7632 #define FSMC_BWTR4_ADDHLD_0 (0x1UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000010 */7633 #define FSMC_BWTR4_ADDHLD_1 (0x2UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000020 */7634 #define FSMC_BWTR4_ADDHLD_2 (0x4UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000040 */7635 #define FSMC_BWTR4_ADDHLD_3 (0x8UL << FSMC_BWTR4_ADDHLD_Pos) /*!< 0x00000080 */
