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Searched refs:FSMC_BCR4_MTYP_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h6839 #define FSMC_BCR4_MTYP_Pos (2U) macro
6840 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6842 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6843 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f205xx.h6689 #define FSMC_BCR4_MTYP_Pos (2U) macro
6690 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6692 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6693 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f207xx.h6988 #define FSMC_BCR4_MTYP_Pos (2U) macro
6989 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6991 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6992 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f217xx.h7138 #define FSMC_BCR4_MTYP_Pos (2U) macro
7139 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
7141 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
7142 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h6727 #define FSMC_BCR4_MTYP_Pos (2U) macro
6728 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6730 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6731 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f415xx.h6909 #define FSMC_BCR4_MTYP_Pos (2U) macro
6910 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6912 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6913 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f423xx.h7204 #define FSMC_BCR4_MTYP_Pos (2U) macro
7205 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
7207 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
7208 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f407xx.h7027 #define FSMC_BCR4_MTYP_Pos (2U) macro
7028 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
7030 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
7031 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f412zx.h6848 #define FSMC_BCR4_MTYP_Pos (2U) macro
6849 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6851 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6852 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f412rx.h6842 #define FSMC_BCR4_MTYP_Pos (2U) macro
6843 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6845 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6846 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f412vx.h6844 #define FSMC_BCR4_MTYP_Pos (2U) macro
6845 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
6847 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
6848 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f413xx.h7168 #define FSMC_BCR4_MTYP_Pos (2U) macro
7169 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
7171 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
7172 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */
Dstm32f417xx.h7206 #define FSMC_BCR4_MTYP_Pos (2U) macro
7207 #define FSMC_BCR4_MTYP_Msk (0x3UL << FSMC_BCR4_MTYP_Pos) /*!< 0x0000000C */
7209 #define FSMC_BCR4_MTYP_0 (0x1UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000004 */
7210 #define FSMC_BCR4_MTYP_1 (0x2UL << FSMC_BCR4_MTYP_Pos) /*!< 0x00000008 */