Home
last modified time | relevance | path

Searched refs:FSMC_BCR3_MWID_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h6794 #define FSMC_BCR3_MWID_Pos (4U) macro
6795 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6797 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6798 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f205xx.h6644 #define FSMC_BCR3_MWID_Pos (4U) macro
6645 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6647 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6648 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f207xx.h6943 #define FSMC_BCR3_MWID_Pos (4U) macro
6944 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6946 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6947 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f217xx.h7093 #define FSMC_BCR3_MWID_Pos (4U) macro
7094 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
7096 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
7097 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h6676 #define FSMC_BCR3_MWID_Pos (4U) macro
6677 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6679 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6680 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f415xx.h6858 #define FSMC_BCR3_MWID_Pos (4U) macro
6859 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6861 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6862 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f423xx.h7156 #define FSMC_BCR3_MWID_Pos (4U) macro
7157 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
7159 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
7160 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f407xx.h6976 #define FSMC_BCR3_MWID_Pos (4U) macro
6977 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6979 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6980 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f412zx.h6800 #define FSMC_BCR3_MWID_Pos (4U) macro
6801 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6803 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6804 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f412rx.h6794 #define FSMC_BCR3_MWID_Pos (4U) macro
6795 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6797 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6798 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f412vx.h6796 #define FSMC_BCR3_MWID_Pos (4U) macro
6797 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
6799 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
6800 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f413xx.h7120 #define FSMC_BCR3_MWID_Pos (4U) macro
7121 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
7123 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
7124 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */
Dstm32f417xx.h7155 #define FSMC_BCR3_MWID_Pos (4U) macro
7156 #define FSMC_BCR3_MWID_Msk (0x3UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000030 */
7158 #define FSMC_BCR3_MWID_0 (0x1UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000010 */
7159 #define FSMC_BCR3_MWID_1 (0x2UL << FSMC_BCR3_MWID_Pos) /*!< 0x00000020 */