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Searched refs:FSMC_BCR1_MWID_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h6692 #define FSMC_BCR1_MWID_Pos (4U) macro
6693 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6695 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6696 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f205xx.h6542 #define FSMC_BCR1_MWID_Pos (4U) macro
6543 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6545 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6546 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f207xx.h6841 #define FSMC_BCR1_MWID_Pos (4U) macro
6842 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6844 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6845 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f217xx.h6991 #define FSMC_BCR1_MWID_Pos (4U) macro
6992 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6994 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6995 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h6562 #define FSMC_BCR1_MWID_Pos (4U) macro
6563 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6565 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6566 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f415xx.h6744 #define FSMC_BCR1_MWID_Pos (4U) macro
6745 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6747 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6748 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f423xx.h7042 #define FSMC_BCR1_MWID_Pos (4U) macro
7043 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
7045 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
7046 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f407xx.h6862 #define FSMC_BCR1_MWID_Pos (4U) macro
6863 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6865 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6866 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f412zx.h6686 #define FSMC_BCR1_MWID_Pos (4U) macro
6687 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6689 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6690 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f412rx.h6680 #define FSMC_BCR1_MWID_Pos (4U) macro
6681 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6683 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6684 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f412vx.h6682 #define FSMC_BCR1_MWID_Pos (4U) macro
6683 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
6685 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
6686 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f413xx.h7006 #define FSMC_BCR1_MWID_Pos (4U) macro
7007 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
7009 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
7010 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */
Dstm32f417xx.h7041 #define FSMC_BCR1_MWID_Pos (4U) macro
7042 #define FSMC_BCR1_MWID_Msk (0x3UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000030 */
7044 #define FSMC_BCR1_MWID_0 (0x1UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000010 */
7045 #define FSMC_BCR1_MWID_1 (0x2UL << FSMC_BCR1_MWID_Pos) /*!< 0x00000020 */