Searched refs:FMC_PMEM4_MEMWAIT4_Pos (Results 1 – 9 of 9) sorted by relevance
897 ((Timing->WaitSetupTime) << FMC_PMEM4_MEMWAIT4_Pos) | in FMC_PCCARD_CommonSpace_Timing_Init()
8989 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro8990 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */8992 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */8993 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */8994 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */8995 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */8996 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */8997 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */8998 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */8999 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
9552 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro9553 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */9555 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */9556 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */9557 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */9558 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */9559 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */9560 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */9561 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */9562 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
9490 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro9491 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */9493 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */9494 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */9495 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */9496 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */9497 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */9498 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */9499 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */9500 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
1040 ((Timing->WaitSetupTime) << FMC_PMEM4_MEMWAIT4_Pos) | in FMC_PCCARD_CommonSpace_Timing_Init()
8196 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro8197 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */8199 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */8200 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */8201 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */8202 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */8203 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */8204 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */8205 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */8206 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
8255 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro8256 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */8258 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */8259 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */8260 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */8261 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */8262 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */8263 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */8264 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */8265 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
8442 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro8443 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */8445 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */8446 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */8447 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */8448 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */8449 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */8450 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */8451 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */8452 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
8388 #define FMC_PMEM4_MEMWAIT4_Pos (8U) macro8389 #define FMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */8391 #define FMC_PMEM4_MEMWAIT4_0 (0x01UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */8392 #define FMC_PMEM4_MEMWAIT4_1 (0x02UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */8393 #define FMC_PMEM4_MEMWAIT4_2 (0x04UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */8394 #define FMC_PMEM4_MEMWAIT4_3 (0x08UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */8395 #define FMC_PMEM4_MEMWAIT4_4 (0x10UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */8396 #define FMC_PMEM4_MEMWAIT4_5 (0x20UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */8397 #define FMC_PMEM4_MEMWAIT4_6 (0x40UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */8398 #define FMC_PMEM4_MEMWAIT4_7 (0x80UL << FMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
