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Searched refs:FMC_PCR4_TCLR_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_fmc.c869 (Init->TCLRSetupTime << FMC_PCR4_TCLR_Pos) | in FMC_PCCARD_Init()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_fmc.c1012 (Init->TCLRSetupTime << FMC_PCR4_TCLR_Pos) | in FMC_PCCARD_Init()
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302xe.h8714 #define FMC_PCR4_TCLR_Pos (9U) macro
8715 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
8717 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
8718 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
8719 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
8720 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */
Dstm32f303xe.h9277 #define FMC_PCR4_TCLR_Pos (9U) macro
9278 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
9280 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
9281 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
9282 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
9283 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */
Dstm32f398xx.h9215 #define FMC_PCR4_TCLR_Pos (9U) macro
9216 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
9218 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
9219 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
9220 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
9221 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h7993 #define FMC_PCR4_TCLR_Pos (9U) macro
7994 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
7996 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
7997 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
7998 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
7999 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */
Dstm32f429xx.h8052 #define FMC_PCR4_TCLR_Pos (9U) macro
8053 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
8055 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
8056 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
8057 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
8058 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */
Dstm32f439xx.h8239 #define FMC_PCR4_TCLR_Pos (9U) macro
8240 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
8242 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
8243 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
8244 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
8245 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */
Dstm32f437xx.h8185 #define FMC_PCR4_TCLR_Pos (9U) macro
8186 #define FMC_PCR4_TCLR_Msk (0xFUL << FMC_PCR4_TCLR_Pos) /*!< 0x00001E00 */
8188 #define FMC_PCR4_TCLR_0 (0x1UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000200 */
8189 #define FMC_PCR4_TCLR_1 (0x2UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000400 */
8190 #define FMC_PCR4_TCLR_2 (0x4UL << FMC_PCR4_TCLR_Pos) /*!< 0x00000800 */
8191 #define FMC_PCR4_TCLR_3 (0x8UL << FMC_PCR4_TCLR_Pos) /*!< 0x00001000 */