/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f302xe.h | 8488 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 8489 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 8491 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 8492 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 8493 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 8494 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32f303xe.h | 9051 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 9052 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 9054 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 9055 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 9056 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 9057 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32f398xx.h | 8989 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 8990 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 8992 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 8993 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 8994 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 8995 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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/hal_stm32-latest/stm32cube/stm32mp1xx/soc/ |
D | stm32mp151dxx_ca7.h | 18639 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18640 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18642 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18643 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18644 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18645 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151fxx_cm4.h | 18802 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18803 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18805 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18806 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18807 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18808 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151axx_ca7.h | 18639 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18640 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18642 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18643 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18644 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18645 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151axx_cm4.h | 18605 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18606 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18608 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18609 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18610 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18611 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151dxx_cm4.h | 18605 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18606 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18608 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18609 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18610 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18611 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151cxx_ca7.h | 18836 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18837 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18839 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18840 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18841 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18842 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151cxx_cm4.h | 18802 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18803 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18805 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18806 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18807 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18808 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151fxx_ca7.h | 18836 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 18837 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 18839 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 18840 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 18841 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 18842 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153axx_ca7.h | 20190 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20191 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20193 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20194 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20195 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20196 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153axx_cm4.h | 20156 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20157 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20159 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20160 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20161 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20162 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153cxx_ca7.h | 20387 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20388 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20390 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20391 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20392 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20393 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153cxx_cm4.h | 20353 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20354 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20356 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20357 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20358 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20359 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153dxx_ca7.h | 20190 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20191 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20193 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20194 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20195 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20196 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153dxx_cm4.h | 20156 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20157 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20159 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20160 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20161 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20162 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153fxx_ca7.h | 20387 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20388 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20390 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20391 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20392 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20393 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153fxx_cm4.h | 20353 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 20354 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 20356 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 20357 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 20358 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 20359 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157axx_ca7.h | 21413 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 21414 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 21416 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 21417 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 21418 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 21419 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157axx_cm4.h | 21379 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 21380 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 21382 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 21383 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 21384 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 21385 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157cxx_ca7.h | 21610 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 21611 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 21613 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 21614 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 21615 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 21616 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157cxx_cm4.h | 21576 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 21577 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 21579 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 21580 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 21581 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 21582 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157dxx_ca7.h | 21413 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 21414 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 21416 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 21417 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 21418 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 21419 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157dxx_cm4.h | 21379 #define FMC_BWTR3_CLKDIV_Pos (20U) macro 21380 #define FMC_BWTR3_CLKDIV_Msk (0xFUL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00F00000 */ 21382 #define FMC_BWTR3_CLKDIV_0 (0x1UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00100000 */ 21383 #define FMC_BWTR3_CLKDIV_1 (0x2UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00200000 */ 21384 #define FMC_BWTR3_CLKDIV_2 (0x4UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00400000 */ 21385 #define FMC_BWTR3_CLKDIV_3 (0x8UL << FMC_BWTR3_CLKDIV_Pos) /*!< 0x00800000 */
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