/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f302xe.h | 8437 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 8438 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 8440 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 8441 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 8442 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 8443 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32f303xe.h | 9000 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 9001 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 9003 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 9004 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 9005 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 9006 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32f398xx.h | 8938 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 8939 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 8941 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 8942 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 8943 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 8944 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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/hal_stm32-latest/stm32cube/stm32mp1xx/soc/ |
D | stm32mp151dxx_ca7.h | 18582 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18583 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18585 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18586 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18587 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18588 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151fxx_cm4.h | 18745 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18746 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18748 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18749 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18750 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18751 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151axx_ca7.h | 18582 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18583 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18585 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18586 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18587 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18588 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151axx_cm4.h | 18548 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18549 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18551 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18552 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18553 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18554 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151dxx_cm4.h | 18548 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18549 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18551 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18552 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18553 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18554 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151cxx_ca7.h | 18779 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18780 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18782 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18783 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18784 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18785 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151cxx_cm4.h | 18745 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18746 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18748 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18749 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18750 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18751 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp151fxx_ca7.h | 18779 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 18780 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 18782 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 18783 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 18784 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 18785 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153axx_ca7.h | 20133 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20134 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20136 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20137 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20138 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20139 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153axx_cm4.h | 20099 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20100 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20102 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20103 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20104 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20105 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153cxx_ca7.h | 20330 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20331 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20333 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20334 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20335 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20336 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153cxx_cm4.h | 20296 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20297 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20299 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20300 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20301 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20302 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153dxx_ca7.h | 20133 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20134 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20136 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20137 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20138 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20139 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153dxx_cm4.h | 20099 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20100 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20102 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20103 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20104 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20105 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153fxx_ca7.h | 20330 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20331 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20333 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20334 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20335 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20336 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp153fxx_cm4.h | 20296 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 20297 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 20299 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 20300 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 20301 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 20302 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157axx_ca7.h | 21356 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 21357 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 21359 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 21360 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 21361 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 21362 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157axx_cm4.h | 21322 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 21323 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 21325 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 21326 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 21327 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 21328 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157cxx_ca7.h | 21553 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 21554 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 21556 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 21557 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 21558 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 21559 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157cxx_cm4.h | 21519 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 21520 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 21522 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 21523 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 21524 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 21525 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157dxx_ca7.h | 21356 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 21357 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 21359 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 21360 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 21361 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 21362 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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D | stm32mp157dxx_cm4.h | 21322 #define FMC_BWTR2_CLKDIV_Pos (20U) macro 21323 #define FMC_BWTR2_CLKDIV_Msk (0xFUL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00F00000 */ 21325 #define FMC_BWTR2_CLKDIV_0 (0x1UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00100000 */ 21326 #define FMC_BWTR2_CLKDIV_1 (0x2UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00200000 */ 21327 #define FMC_BWTR2_CLKDIV_2 (0x4UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00400000 */ 21328 #define FMC_BWTR2_CLKDIV_3 (0x8UL << FMC_BWTR2_CLKDIV_Pos) /*!< 0x00800000 */
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