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Searched refs:FMC_BWTR1_CLKDIV_Pos (Results 1 – 25 of 27) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302xe.h8386 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
8387 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
8389 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
8390 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
8391 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
8392 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f303xe.h8949 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
8950 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
8952 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
8953 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
8954 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
8955 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f398xx.h8887 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
8888 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
8890 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
8891 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
8892 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
8893 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h18516 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18517 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18519 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18520 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18521 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18522 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151fxx_cm4.h18679 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18680 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18682 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18683 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18684 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18685 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151axx_ca7.h18516 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18517 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18519 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18520 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18521 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18522 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151axx_cm4.h18482 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18483 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18485 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18486 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18487 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18488 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151dxx_cm4.h18482 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18483 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18485 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18486 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18487 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18488 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151cxx_ca7.h18713 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18714 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18716 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18717 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18718 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18719 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151cxx_cm4.h18679 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18680 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18682 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18683 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18684 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18685 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp151fxx_ca7.h18713 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
18714 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
18716 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
18717 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
18718 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
18719 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153axx_ca7.h20067 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20068 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20070 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20071 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20072 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20073 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153axx_cm4.h20033 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20034 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20036 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20037 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20038 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20039 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153cxx_ca7.h20264 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20265 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20267 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20268 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20269 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20270 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153cxx_cm4.h20230 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20231 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20233 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20234 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20235 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20236 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153dxx_ca7.h20067 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20068 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20070 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20071 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20072 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20073 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153dxx_cm4.h20033 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20034 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20036 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20037 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20038 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20039 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153fxx_ca7.h20264 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20265 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20267 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20268 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20269 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20270 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp153fxx_cm4.h20230 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
20231 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
20233 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
20234 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
20235 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
20236 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp157axx_ca7.h21290 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
21291 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
21293 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
21294 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
21295 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
21296 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp157axx_cm4.h21256 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
21257 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
21259 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
21260 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
21261 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
21262 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp157cxx_ca7.h21487 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
21488 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
21490 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
21491 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
21492 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
21493 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp157cxx_cm4.h21453 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
21454 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
21456 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
21457 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
21458 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
21459 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp157dxx_ca7.h21290 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
21291 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
21293 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
21294 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
21295 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
21296 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32mp157dxx_cm4.h21256 #define FMC_BWTR1_CLKDIV_Pos (20U) macro
21257 #define FMC_BWTR1_CLKDIV_Msk (0xFUL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00F00000 */
21259 #define FMC_BWTR1_CLKDIV_0 (0x1UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00100000 */
21260 #define FMC_BWTR1_CLKDIV_1 (0x2UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00200000 */
21261 #define FMC_BWTR1_CLKDIV_2 (0x4UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00400000 */
21262 #define FMC_BWTR1_CLKDIV_3 (0x8UL << FMC_BWTR1_CLKDIV_Pos) /*!< 0x00800000 */

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