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Searched refs:FMC_BTR3_CLKDIV_Pos (Results 1 – 25 of 48) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302xe.h8214 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8215 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8217 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8218 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8219 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8220 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f303xe.h8777 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8778 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8780 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8781 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8782 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8783 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f398xx.h8715 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8716 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8718 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8719 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8720 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8721 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h6913 #define FMC_BTR3_CLKDIV_Pos (20U) macro
6914 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
6916 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
6917 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
6918 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
6919 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f722xx.h6897 #define FMC_BTR3_CLKDIV_Pos (20U) macro
6898 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
6900 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
6901 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
6902 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
6903 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f730xx.h7127 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7128 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7130 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7131 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7132 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7133 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f733xx.h7127 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7128 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7130 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7131 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7132 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7133 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f732xx.h7111 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7112 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7114 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7115 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7116 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7117 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f750xx.h7931 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7932 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7934 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7935 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7936 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7937 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f745xx.h7688 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7689 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7691 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7692 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7693 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7694 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f756xx.h7931 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7932 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7934 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7935 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7936 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7937 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f746xx.h7743 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7744 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7746 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7747 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7748 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7749 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f765xx.h8201 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8202 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8204 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8205 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8206 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8207 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f777xx.h8483 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8484 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8486 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8487 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8488 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8489 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f767xx.h8295 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8296 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8298 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8299 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8300 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8301 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f779xx.h8566 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8567 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8569 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8570 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8571 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8572 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f769xx.h8378 #define FMC_BTR3_CLKDIV_Pos (20U) macro
8379 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
8381 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
8382 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
8383 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
8384 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h7630 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7631 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7633 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7634 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7635 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7636 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f446xx.h7399 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7400 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7402 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7403 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7404 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7405 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f429xx.h7689 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7690 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7692 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7693 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7694 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7695 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f439xx.h7876 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7877 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7879 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7880 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7881 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7882 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f437xx.h7822 #define FMC_BTR3_CLKDIV_Pos (20U) macro
7823 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
7825 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
7826 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
7827 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
7828 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f469xx.h10839 #define FMC_BTR3_CLKDIV_Pos (20U) macro
10840 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
10842 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
10843 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
10844 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
10845 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
Dstm32f479xx.h11029 #define FMC_BTR3_CLKDIV_Pos (20U) macro
11030 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
11032 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
11033 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
11034 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
11035 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h18373 #define FMC_BTR3_CLKDIV_Pos (20U) macro
18374 #define FMC_BTR3_CLKDIV_Msk (0xFUL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00F00000 */
18376 #define FMC_BTR3_CLKDIV_0 (0x1UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00100000 */
18377 #define FMC_BTR3_CLKDIV_1 (0x2UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00200000 */
18378 #define FMC_BTR3_CLKDIV_2 (0x4UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00400000 */
18379 #define FMC_BTR3_CLKDIV_3 (0x8UL << FMC_BTR3_CLKDIV_Pos) /*!< 0x00800000 */

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