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Searched refs:FMC_BCR4_CPSIZE_Pos (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h6764 #define FMC_BCR4_CPSIZE_Pos (16U) macro
6765 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
6767 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
6768 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
6769 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f722xx.h6748 #define FMC_BCR4_CPSIZE_Pos (16U) macro
6749 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
6751 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
6752 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
6753 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f730xx.h6978 #define FMC_BCR4_CPSIZE_Pos (16U) macro
6979 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
6981 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
6982 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
6983 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f733xx.h6978 #define FMC_BCR4_CPSIZE_Pos (16U) macro
6979 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
6981 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
6982 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
6983 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f732xx.h6962 #define FMC_BCR4_CPSIZE_Pos (16U) macro
6963 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
6965 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
6966 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
6967 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f750xx.h7782 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7783 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7785 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7786 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7787 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f745xx.h7539 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7540 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7542 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7543 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7544 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f756xx.h7782 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7783 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7785 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7786 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7787 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f746xx.h7594 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7595 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7597 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7598 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7599 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f765xx.h8052 #define FMC_BCR4_CPSIZE_Pos (16U) macro
8053 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
8055 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
8056 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
8057 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f777xx.h8334 #define FMC_BCR4_CPSIZE_Pos (16U) macro
8335 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
8337 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
8338 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
8339 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f767xx.h8146 #define FMC_BCR4_CPSIZE_Pos (16U) macro
8147 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
8149 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
8150 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
8151 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f779xx.h8417 #define FMC_BCR4_CPSIZE_Pos (16U) macro
8418 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
8420 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
8421 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
8422 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f769xx.h8229 #define FMC_BCR4_CPSIZE_Pos (16U) macro
8230 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
8232 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
8233 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
8234 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h7465 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7466 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7468 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7469 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7470 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f429xx.h7524 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7525 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7527 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7528 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7529 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f439xx.h7711 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7712 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7714 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7715 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7716 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f437xx.h7657 #define FMC_BCR4_CPSIZE_Pos (16U) macro
7658 #define FMC_BCR4_CPSIZE_Msk (0x7UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00070000 */
7660 #define FMC_BCR4_CPSIZE_0 (0x1UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00010000 */
7661 #define FMC_BCR4_CPSIZE_1 (0x2UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00020000 */
7662 #define FMC_BCR4_CPSIZE_2 (0x4UL << FMC_BCR4_CPSIZE_Pos) /*!< 0x00040000 */