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Searched refs:FMC_BCR3_CPSIZE_Pos (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h6710 #define FMC_BCR3_CPSIZE_Pos (16U) macro
6711 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
6713 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
6714 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
6715 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f722xx.h6694 #define FMC_BCR3_CPSIZE_Pos (16U) macro
6695 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
6697 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
6698 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
6699 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f730xx.h6924 #define FMC_BCR3_CPSIZE_Pos (16U) macro
6925 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
6927 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
6928 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
6929 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f733xx.h6924 #define FMC_BCR3_CPSIZE_Pos (16U) macro
6925 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
6927 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
6928 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
6929 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f732xx.h6908 #define FMC_BCR3_CPSIZE_Pos (16U) macro
6909 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
6911 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
6912 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
6913 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f750xx.h7728 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7729 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7731 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7732 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7733 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f745xx.h7485 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7486 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7488 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7489 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7490 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f756xx.h7728 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7729 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7731 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7732 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7733 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f746xx.h7540 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7541 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7543 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7544 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7545 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f765xx.h7998 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7999 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
8001 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
8002 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
8003 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f777xx.h8280 #define FMC_BCR3_CPSIZE_Pos (16U) macro
8281 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
8283 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
8284 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
8285 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f767xx.h8092 #define FMC_BCR3_CPSIZE_Pos (16U) macro
8093 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
8095 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
8096 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
8097 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f779xx.h8363 #define FMC_BCR3_CPSIZE_Pos (16U) macro
8364 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
8366 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
8367 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
8368 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f769xx.h8175 #define FMC_BCR3_CPSIZE_Pos (16U) macro
8176 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
8178 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
8179 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
8180 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h7408 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7409 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7411 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7412 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7413 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f429xx.h7467 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7468 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7470 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7471 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7472 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f439xx.h7654 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7655 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7657 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7658 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7659 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f437xx.h7600 #define FMC_BCR3_CPSIZE_Pos (16U) macro
7601 #define FMC_BCR3_CPSIZE_Msk (0x7UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00070000 */
7603 #define FMC_BCR3_CPSIZE_0 (0x1UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00010000 */
7604 #define FMC_BCR3_CPSIZE_1 (0x2UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00020000 */
7605 #define FMC_BCR3_CPSIZE_2 (0x4UL << FMC_BCR3_CPSIZE_Pos) /*!< 0x00040000 */