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Searched refs:FMC_BCR2_CPSIZE_Pos (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h6656 #define FMC_BCR2_CPSIZE_Pos (16U) macro
6657 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
6659 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
6660 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
6661 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f722xx.h6640 #define FMC_BCR2_CPSIZE_Pos (16U) macro
6641 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
6643 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
6644 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
6645 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f730xx.h6870 #define FMC_BCR2_CPSIZE_Pos (16U) macro
6871 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
6873 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
6874 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
6875 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f733xx.h6870 #define FMC_BCR2_CPSIZE_Pos (16U) macro
6871 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
6873 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
6874 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
6875 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f732xx.h6854 #define FMC_BCR2_CPSIZE_Pos (16U) macro
6855 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
6857 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
6858 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
6859 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f750xx.h7674 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7675 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7677 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7678 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7679 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f745xx.h7431 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7432 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7434 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7435 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7436 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f756xx.h7674 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7675 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7677 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7678 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7679 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f746xx.h7486 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7487 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7489 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7490 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7491 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f765xx.h7944 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7945 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7947 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7948 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7949 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f777xx.h8226 #define FMC_BCR2_CPSIZE_Pos (16U) macro
8227 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
8229 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
8230 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
8231 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f767xx.h8038 #define FMC_BCR2_CPSIZE_Pos (16U) macro
8039 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
8041 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
8042 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
8043 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f779xx.h8309 #define FMC_BCR2_CPSIZE_Pos (16U) macro
8310 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
8312 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
8313 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
8314 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f769xx.h8121 #define FMC_BCR2_CPSIZE_Pos (16U) macro
8122 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
8124 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
8125 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
8126 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h7351 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7352 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7354 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7355 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7356 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f429xx.h7410 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7411 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7413 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7414 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7415 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f439xx.h7597 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7598 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7600 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7601 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7602 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */
Dstm32f437xx.h7543 #define FMC_BCR2_CPSIZE_Pos (16U) macro
7544 #define FMC_BCR2_CPSIZE_Msk (0x7UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00070000 */
7546 #define FMC_BCR2_CPSIZE_0 (0x1UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00010000 */
7547 #define FMC_BCR2_CPSIZE_1 (0x2UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00020000 */
7548 #define FMC_BCR2_CPSIZE_2 (0x4UL << FMC_BCR2_CPSIZE_Pos) /*!< 0x00040000 */