Home
last modified time | relevance | path

Searched refs:FDCAN_TTIR_GTW_Pos (Results 1 – 25 of 42) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h5005 #define FDCAN_TTIR_GTW_Pos (7U) macro
5006 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h7b0xx.h5140 #define FDCAN_TTIR_GTW_Pos (7U) macro
5141 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h7b0xxq.h5141 #define FDCAN_TTIR_GTW_Pos (7U) macro
5142 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h7a3xxq.h5006 #define FDCAN_TTIR_GTW_Pos (7U) macro
5007 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h7b3xx.h5140 #define FDCAN_TTIR_GTW_Pos (7U) macro
5141 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h7b3xxq.h5141 #define FDCAN_TTIR_GTW_Pos (7U) macro
5142 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h730xxq.h5375 #define FDCAN_TTIR_GTW_Pos (7U) macro
5376 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h733xx.h5374 #define FDCAN_TTIR_GTW_Pos (7U) macro
5375 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h725xx.h5240 #define FDCAN_TTIR_GTW_Pos (7U) macro
5241 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h730xx.h5374 #define FDCAN_TTIR_GTW_Pos (7U) macro
5375 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h735xx.h5375 #define FDCAN_TTIR_GTW_Pos (7U) macro
5376 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h742xx.h5027 #define FDCAN_TTIR_GTW_Pos (7U) macro
5028 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h723xx.h5239 #define FDCAN_TTIR_GTW_Pos (7U) macro
5240 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h750xx.h5198 #define FDCAN_TTIR_GTW_Pos (7U) macro
5199 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h753xx.h5198 #define FDCAN_TTIR_GTW_Pos (7U) macro
5199 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h745xx.h5229 #define FDCAN_TTIR_GTW_Pos (7U) macro
5230 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h745xg.h5229 #define FDCAN_TTIR_GTW_Pos (7U) macro
5230 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h743xx.h5122 #define FDCAN_TTIR_GTW_Pos (7U) macro
5123 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h755xx.h5305 #define FDCAN_TTIR_GTW_Pos (7U) macro
5306 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h757xx.h5388 #define FDCAN_TTIR_GTW_Pos (7U) macro
5389 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h747xg.h5312 #define FDCAN_TTIR_GTW_Pos (7U) macro
5313 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32h747xx.h5312 #define FDCAN_TTIR_GTW_Pos (7U) macro
5313 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp153axx_ca7.h6195 #define FDCAN_TTIR_GTW_Pos (7U) macro
6196 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32mp153axx_cm4.h6161 #define FDCAN_TTIR_GTW_Pos (7U) macro
6162 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */
Dstm32mp153cxx_ca7.h6247 #define FDCAN_TTIR_GTW_Pos (7U) macro
6248 #define FDCAN_TTIR_GTW_Msk (0x1UL << FDCAN_TTIR_GTW_Pos) /*!< 0x00000080 */

12