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Searched refs:FDCANCCU_CSTAT_TQC_Pos (Results 1 – 25 of 45) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_fdcan.c794 return ((FDCAN_CCU->CSTAT & FDCANCCU_CSTAT_TQC) >> FDCANCCU_CSTAT_TQC_Pos); in HAL_FDCAN_GetClockCalibrationCounter()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_fdcan.c1813 return ((FDCAN_CCU->CSTAT & FDCANCCU_CSTAT_TQC) >> FDCANCCU_CSTAT_TQC_Pos); in HAL_FDCAN_GetClockCalibrationCounter()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_fdcan.c1813 return ((FDCAN_CCU->CSTAT & FDCANCCU_CSTAT_TQC) >> FDCANCCU_CSTAT_TQC_Pos); in HAL_FDCAN_GetClockCalibrationCounter()
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h5296 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5297 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h7b0xx.h5431 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5432 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h7b0xxq.h5432 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5433 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h7a3xxq.h5297 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5298 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h7b3xx.h5431 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5432 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h7b3xxq.h5432 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5433 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h730xxq.h5666 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5667 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h733xx.h5665 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5666 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h725xx.h5531 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5532 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h730xx.h5665 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5666 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h735xx.h5666 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5667 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h742xx.h5318 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5319 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h723xx.h5530 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5531 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h750xx.h5489 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5490 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h753xx.h5489 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5490 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h745xx.h5520 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5521 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h745xg.h5520 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5521 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h743xx.h5413 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5414 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h755xx.h5596 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5597 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h757xx.h5679 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5680 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h747xg.h5603 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5604 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */
Dstm32h747xx.h5603 #define FDCANCCU_CSTAT_TQC_Pos (18U) macro
5604 #define FDCANCCU_CSTAT_TQC_Msk (0x7FFUL << FDCANCCU_CSTAT_TQC_Pos) /*!< 0x1FFC0000 */

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