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Searched refs:FDCANCCU_CCFG_CDIV_Pos (Results 1 – 25 of 44) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_fdcan.c1718 (sCcuConfig->ClockDivider << FDCANCCU_CCFG_CDIV_Pos)); in HAL_FDCAN_ConfigClockCalibration()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_fdcan.c1718 (sCcuConfig->ClockDivider << FDCANCCU_CCFG_CDIV_Pos)); in HAL_FDCAN_ConfigClockCalibration()
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h5285 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5286 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h7b0xx.h5420 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5421 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h7b0xxq.h5421 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5422 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h7a3xxq.h5286 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5287 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h7b3xx.h5420 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5421 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h7b3xxq.h5421 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5422 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h730xxq.h5655 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5656 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h733xx.h5654 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5655 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h725xx.h5520 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5521 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h730xx.h5654 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5655 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h735xx.h5655 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5656 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h742xx.h5307 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5308 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h723xx.h5519 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5520 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h750xx.h5478 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5479 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h753xx.h5478 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5479 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h745xx.h5509 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5510 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h745xg.h5509 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5510 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h743xx.h5402 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5403 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h755xx.h5585 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5586 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h757xx.h5668 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5669 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h747xg.h5592 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5593 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
Dstm32h747xx.h5592 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
5593 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp153axx_ca7.h6475 #define FDCANCCU_CCFG_CDIV_Pos (16U) macro
6476 #define FDCANCCU_CCFG_CDIV_Msk (0xFUL << FDCANCCU_CCFG_CDIV_Pos) /*!< 0x000F0000 */

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