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Searched refs:FCR1 (Results 1 – 25 of 32) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c1977 WRITE_REG(GTZC_TZIC1->FCR1, TZIC1_FCR1_ALL); in HAL_GTZC_TZIC_ClearFlag()
1981 WRITE_REG(GTZC_TZIC2->FCR1, TZIC2_FCR1_ALL); in HAL_GTZC_TZIC_ClearFlag()
1987 register_address = (uint32_t) &(HAL_GTZC_TZIC_GET_INSTANCE(PeriphId)->FCR1) in HAL_GTZC_TZIC_ClearFlag()
2035 WRITE_REG(GTZC_TZIC1_S->FCR1, flag); in HAL_GTZC_IRQHandler()
2135 WRITE_REG(GTZC_TZIC2_S->FCR1, flag); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c1329 WRITE_REG(GTZC_TZIC->FCR1, TZIC1_FCR1_ALL); in HAL_GTZC_TZIC_ClearFlag()
1337 register_address = (uint32_t) &(GTZC_TZIC->FCR1) in HAL_GTZC_TZIC_ClearFlag()
1385 WRITE_REG(GTZC_TZIC_S->FCR1, flag); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_gtzc.c1358 WRITE_REG(GTZC_TZIC->FCR1, TZIC_FCR1_ALL); in HAL_GTZC_TZIC_ClearFlag()
1365 register_address = (uint32_t) &(GTZC_TZIC->FCR1) + (4U * GTZC_GET_REG_INDEX(PeriphId)); in HAL_GTZC_TZIC_ClearFlag()
1408 WRITE_REG(GTZC_TZIC->FCR1, flag); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c1681 WRITE_REG(GTZC_TZIC1->FCR1, GTZC_CFGR1_MSK); in HAL_GTZC_TZIC_ClearFlag()
1689 register_address = (uint32_t) &(GTZC_TZIC1->FCR1) in HAL_GTZC_TZIC_ClearFlag()
1733 WRITE_REG(GTZC_TZIC1_S->FCR1, flag); in HAL_GTZC_IRQHandler()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_hal_dcmipp.h1751 #define __HAL_DCMIPP_CSI_CLEAR_DPHY_FLAG(__HANDLE__, __FLAG__)((__HANDLE__)->FCR1 = (__FLAG__))
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h433 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32wba54xx.h450 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32wba5mxx.h450 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32wba55xx.h450 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h673 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32l562xx.h707 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h658 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32h562xx.h705 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32h533xx.h695 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32h573xx.h920 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32h563xx.h883 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h607 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u535xx.h568 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u575xx.h621 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u585xx.h661 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u595xx.h645 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u5a5xx.h685 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u5f7xx.h677 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u599xx.h779 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member
Dstm32u5g7xx.h717 __IO uint32_t FCR1; /*!< TZIC flag clear register 1, Address offset: 0x20 */ member

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