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Searched refs:ETH_MTLESTGCLCR_SRWO (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth_ex.c1424 while (READ_BIT(heth->Instance->MTLESTGCLCR, ETH_MTLESTGCLCR_SRWO) != (uint32_t)RESET) in ETHEx_ESTHWCompletionCheck()
1442 uint32_t mtlestgclctrl = ETH_MTLESTGCLCR_GCRR | ETH_MTLESTGCLCR_SRWO | ETH_MTLESTGCLCR_R1W0; in HAL_ETHEx_GetGCLRegisters()
1519 uint32_t mtlestgclctrl = ETH_MTLESTGCLCR_GCRR | ETH_MTLESTGCLCR_SRWO; in HAL_ETHEx_SetGCLRegisters()
1609 (glcidx << ETH_MTLESTGCLCR_ADDR_Pos) | ETH_MTLESTGCLCR_SRWO); in HAL_ETHEx_SetGCLConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h13953 #define ETH_MTLESTGCLCR_SRWO ETH_MTLESTGCLCR_SRWO_Msk /* Start Read/Write… macro
Dstm32n657xx.h14895 #define ETH_MTLESTGCLCR_SRWO ETH_MTLESTGCLCR_SRWO_Msk /* Start Read/Write… macro
Dstm32n655xx.h14653 #define ETH_MTLESTGCLCR_SRWO ETH_MTLESTGCLCR_SRWO_Msk /* Start Read/Write… macro
Dstm32n647xx.h14195 #define ETH_MTLESTGCLCR_SRWO ETH_MTLESTGCLCR_SRWO_Msk /* Start Read/Write… macro