Home
last modified time | relevance | path

Searched refs:ETH_MMCCR_ROR_Msk (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f207xx.h12716 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
12717 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f217xx.h12971 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
12972 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f407xx.h13263 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
13264 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f427xx.h14459 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
14460 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f417xx.h13543 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
13544 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f429xx.h14815 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
14816 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f439xx.h15109 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
15110 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f437xx.h14761 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
14762 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f469xx.h17831 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
17832 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
Dstm32f479xx.h18128 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
18129 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read …
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f107xc.h13057 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 */ macro
13058 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h15712 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
15713 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f745xx.h15071 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
15072 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f756xx.h15712 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
15713 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f746xx.h15419 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
15420 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f765xx.h15705 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
15706 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f777xx.h16392 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
16393 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f767xx.h16099 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
16100 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f779xx.h16487 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
16488 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */
Dstm32f769xx.h16194 #define ETH_MMCCR_ROR_Msk (0x1UL << ETH_MMCCR_ROR_Pos) /*!< 0x00000004 … macro
16195 #define ETH_MMCCR_ROR ETH_MMCCR_ROR_Msk /* Reset on Read */