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Searched refs:ETH_MACTSCR_TSIPV6ENA_Pos (Results 1 – 25 of 54) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_eth.c1515 ((uint32_t)ptpconfig->TimestampIPv6 << ETH_MACTSCR_TSIPV6ENA_Pos) | in HAL_ETH_PTP_SetConfig()
1586 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_eth.c1527 ((uint32_t)ptpconfig->TimestampIPv6 << ETH_MACTSCR_TSIPV6ENA_Pos) | in HAL_ETH_PTP_SetConfig()
1604 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_eth.c1527 ((uint32_t)ptpconfig->TimestampIPv6 << ETH_MACTSCR_TSIPV6ENA_Pos) | in HAL_ETH_PTP_SetConfig()
1604 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth.c1576 ((uint32_t)ptpconfig->TimestampIPv6 << ETH_MACTSCR_TSIPV6ENA_Pos) | in HAL_ETH_PTP_SetConfig()
1649 ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h6729 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
6730 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h7s7xx.h7253 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7254 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h7s3xx.h7174 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7175 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h7r7xx.h6806 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
6807 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h730xxq.h8311 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8312 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h733xx.h8310 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8311 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h725xx.h8057 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8058 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h730xx.h8310 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8311 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h735xx.h8311 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8312 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h742xx.h7783 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7784 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h723xx.h8056 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8057 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h750xx.h8071 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8072 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h753xx.h8071 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8072 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h745xx.h7985 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7986 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h745xg.h7985 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7986 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h743xx.h7878 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7879 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h755xx.h8178 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8179 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h757xx.h8261 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8262 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h747xg.h8068 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
8069 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h573xx.h7202 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
7203 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…
Dstm32h563xx.h6793 #define ETH_MACTSCR_TSIPV6ENA_Pos (12U) macro
6794 #define ETH_MACTSCR_TSIPV6ENA_Msk (0x1UL << ETH_MACTSCR_TSIPV6ENA_Pos) /*!< 0x0…

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