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Searched refs:ETH_MACTSCR_TSEVNTENA_Pos (Results 1 – 25 of 54) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_eth.c1517 ((uint32_t)ptpconfig->TimestampEvent << ETH_MACTSCR_TSEVNTENA_Pos) | in HAL_ETH_PTP_SetConfig()
1590 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_eth.c1529 ((uint32_t)ptpconfig->TimestampEvent << ETH_MACTSCR_TSEVNTENA_Pos) | in HAL_ETH_PTP_SetConfig()
1608 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_eth.c1529 ((uint32_t)ptpconfig->TimestampEvent << ETH_MACTSCR_TSEVNTENA_Pos) | in HAL_ETH_PTP_SetConfig()
1608 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth.c1578 ((uint32_t)ptpconfig->TimestampEvent << ETH_MACTSCR_TSEVNTENA_Pos) | in HAL_ETH_PTP_SetConfig()
1653 ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h6723 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
6724 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h7s7xx.h7247 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7248 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h7s3xx.h7168 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7169 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h7r7xx.h6800 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
6801 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h730xxq.h8305 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8306 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h733xx.h8304 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8305 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h725xx.h8051 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8052 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h730xx.h8304 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8305 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h735xx.h8305 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8306 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h742xx.h7777 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7778 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h723xx.h8050 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8051 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h750xx.h8065 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8066 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h753xx.h8065 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8066 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h745xx.h7979 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7980 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h745xg.h7979 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7980 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h743xx.h7872 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7873 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h755xx.h8172 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8173 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h757xx.h8255 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8256 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h747xg.h8062 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
8063 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h573xx.h7196 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
7197 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…
Dstm32h563xx.h6787 #define ETH_MACTSCR_TSEVNTENA_Pos (14U) macro
6788 #define ETH_MACTSCR_TSEVNTENA_Msk (0x1UL << ETH_MACTSCR_TSEVNTENA_Pos) /*!< 0x0…

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