Home
last modified time | relevance | path

Searched refs:ETH_MACPPSCR_PPSCMD_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h13678 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13679 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13681 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13682 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13683 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13684 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151fxx_cm4.h13841 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13842 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13844 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13845 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13846 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13847 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151axx_ca7.h13678 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13679 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13681 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13682 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13683 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13684 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151axx_cm4.h13644 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13645 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13647 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13648 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13649 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13650 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151dxx_cm4.h13644 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13645 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13647 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13648 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13649 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13650 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151cxx_ca7.h13875 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13876 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13878 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13879 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13880 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13881 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151cxx_cm4.h13841 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13842 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13844 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13845 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13846 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13847 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp151fxx_ca7.h13875 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
13876 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13878 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13879 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13880 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
13881 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153axx_ca7.h15229 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15230 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15232 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15233 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15234 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15235 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153axx_cm4.h15195 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15196 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15198 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15199 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15200 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15201 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153cxx_ca7.h15426 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15427 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15429 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15430 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15431 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15432 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153cxx_cm4.h15392 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15393 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15395 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15396 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15397 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15398 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153dxx_ca7.h15229 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15230 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15232 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15233 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15234 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15235 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153dxx_cm4.h15195 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15196 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15198 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15199 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15200 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15201 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153fxx_ca7.h15426 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15427 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15429 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15430 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15431 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15432 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp153fxx_cm4.h15392 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15393 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15395 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15396 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15397 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15398 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157axx_ca7.h15344 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15345 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15347 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15348 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15349 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15350 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157axx_cm4.h15310 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15311 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15313 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15314 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15315 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15316 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157cxx_ca7.h15541 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15542 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15544 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15545 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15546 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15547 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157cxx_cm4.h15507 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15508 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15510 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15511 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15512 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15513 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157dxx_ca7.h15344 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15345 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15347 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15348 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15349 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15350 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157dxx_cm4.h15310 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15311 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15313 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15314 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15315 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15316 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157fxx_ca7.h15541 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15542 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15544 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15545 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15546 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15547 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
Dstm32mp157fxx_cm4.h15507 #define ETH_MACPPSCR_PPSCMD_Pos (0U) macro
15508 #define ETH_MACPPSCR_PPSCMD_Msk (0xFUL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15510 #define ETH_MACPPSCR_PPSCMD_0 (0x1UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15511 #define ETH_MACPPSCR_PPSCMD_1 (0x2UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15512 #define ETH_MACPPSCR_PPSCMD_2 (0x4UL << ETH_MACPPSCR_PPSCMD_Pos) /*…
15513 #define ETH_MACPPSCR_PPSCMD_3 (0x8UL << ETH_MACPPSCR_PPSCMD_Pos) /*…