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Searched refs:ETH_MACLMIR_DRSYNCR_Pos (Results 1 – 25 of 50) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h13974 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
13975 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
13977 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13978 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13979 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151fxx_cm4.h14137 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
14138 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
14140 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14141 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14142 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151axx_ca7.h13974 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
13975 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
13977 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13978 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13979 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151axx_cm4.h13940 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
13941 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
13943 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13944 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13945 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151dxx_cm4.h13940 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
13941 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
13943 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13944 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
13945 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151cxx_ca7.h14171 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
14172 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
14174 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14175 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14176 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151cxx_cm4.h14137 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
14138 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
14140 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14141 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14142 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp151fxx_ca7.h14171 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
14172 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
14174 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14175 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
14176 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153axx_ca7.h15525 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15526 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15528 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15529 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15530 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153axx_cm4.h15491 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15492 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15494 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15495 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15496 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153cxx_ca7.h15722 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15723 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15725 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15726 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15727 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153cxx_cm4.h15688 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15689 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15691 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15692 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15693 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153dxx_ca7.h15525 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15526 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15528 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15529 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15530 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153dxx_cm4.h15491 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15492 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15494 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15495 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15496 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153fxx_ca7.h15722 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15723 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15725 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15726 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15727 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp153fxx_cm4.h15688 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15689 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15691 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15692 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15693 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157axx_ca7.h15640 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15641 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15643 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15644 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15645 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157axx_cm4.h15606 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15607 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15609 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15610 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15611 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157cxx_ca7.h15837 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15838 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15840 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15841 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15842 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157cxx_cm4.h15803 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15804 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15806 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15807 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15808 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157dxx_ca7.h15640 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15641 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15643 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15644 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15645 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157dxx_cm4.h15606 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15607 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15609 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15610 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15611 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157fxx_ca7.h15837 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15838 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15840 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15841 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15842 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
Dstm32mp157fxx_cm4.h15803 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
15804 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*…
15806 #define ETH_MACLMIR_DRSYNCR_0 (0x1UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15807 #define ETH_MACLMIR_DRSYNCR_1 (0x2UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
15808 #define ETH_MACLMIR_DRSYNCR_2 (0x4UL << ETH_MACLMIR_DRSYNCR_Pos) /*!<…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h6958 #define ETH_MACLMIR_DRSYNCR_Pos (8U) macro
6959 #define ETH_MACLMIR_DRSYNCR_Msk (0x7UL << ETH_MACLMIR_DRSYNCR_Pos) /*!< 0x000…

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