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Searched refs:ETH_MACCR_RE (Results 1 – 25 of 81) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_eth.c732 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
808 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
849 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
907 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/Legacy/
Dstm32h7xx_hal_eth.c761 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
816 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
869 CLEAR_BIT( heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
920 CLEAR_BIT( heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_eth.c732 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
808 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
849 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
907 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_eth.c733 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
794 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
833 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
883 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_eth.c733 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
794 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
833 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
883 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_eth.c733 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
794 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
833 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
883 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth.c758 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
819 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
856 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
912 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_eth.c2166 (heth->Instance)->MACCR |= ETH_MACCR_RE; in ETH_MACReceptionEnable()
2186 (heth->Instance)->MACCR &= ~ETH_MACCR_RE; in ETH_MACReceptionDisable()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/Legacy/
Dstm32f7xx_hal_eth.c2170 (heth->Instance)->MACCR |= ETH_MACCR_RE; in ETH_MACReceptionEnable()
2190 (heth->Instance)->MACCR &= ~ETH_MACCR_RE; in ETH_MACReceptionDisable()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_eth.c2155 (heth->Instance)->MACCR |= ETH_MACCR_RE; in ETH_MACReceptionEnable()
2175 (heth->Instance)->MACCR &= ~ETH_MACCR_RE; in ETH_MACReceptionDisable()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/Legacy/
Dstm32f4xx_hal_eth.c2172 (heth->Instance)->MACCR |= ETH_MACCR_RE; in ETH_MACReceptionEnable()
2192 (heth->Instance)->MACCR &= ~ETH_MACCR_RE; in ETH_MACReceptionDisable()
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f207xx.h12343 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f217xx.h12598 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f407xx.h12887 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f427xx.h14083 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f417xx.h13167 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f429xx.h14439 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f439xx.h14733 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f437xx.h14385 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f107xc.h12773 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h15336 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f745xx.h14695 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f756xx.h15336 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f746xx.h15043 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro
Dstm32f765xx.h15329 #define ETH_MACCR_RE ETH_MACCR_RE_Msk /* Receiver enable */ macro

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