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Searched refs:ETH_DMACCR_8PBL (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/Legacy/
Dstm32h7xx_hal_eth.c1977 …dmaconf->PBLx8Mode = ((READ_BIT(heth->Instance->DMACCR, ETH_DMACCR_8PBL)>> 16) > 0U) ? ENABLE : D… in HAL_ETH_GetDMAConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_eth.c2311 …dmaconf->PBLx8Mode = ((READ_BIT(heth->Instance->DMACCR, ETH_DMACCR_8PBL) >> 16) > 0U) ? ENABLE : D… in HAL_ETH_GetDMAConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_eth.c2367 …dmaconf->PBLx8Mode = ((READ_BIT(heth->Instance->DMACCR, ETH_DMACCR_8PBL) >> 16) > 0U) ? ENABLE : D… in HAL_ETH_GetDMAConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_eth.c2329 …dmaconf->PBLx8Mode = ((READ_BIT(heth->Instance->DMACCR, ETH_DMACCR_8PBL) >> 16) > 0U) ? ENABLE : D… in HAL_ETH_GetDMAConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h7248 #define ETH_DMACCR_8PBL ((uint32_t)0x00010000) /* 8xPBL mode */ macro
Dstm32h7s7xx.h7772 #define ETH_DMACCR_8PBL ((uint32_t)0x00010000) /* 8xPBL mode */ macro
Dstm32h7s3xx.h7693 #define ETH_DMACCR_8PBL ((uint32_t)0x00010000) /* 8xPBL mode */ macro
Dstm32h7r7xx.h7325 #define ETH_DMACCR_8PBL ((uint32_t)0x00010000) /* 8xPBL mode */ macro
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h730xxq.h8830 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h733xx.h8829 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h725xx.h8576 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h730xx.h8829 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h735xx.h8830 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h742xx.h8302 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h723xx.h8575 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h750xx.h8590 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h753xx.h8590 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h745xx.h8504 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h745xg.h8504 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h743xx.h8397 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h755xx.h8697 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h757xx.h8780 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
Dstm32h747xg.h8587 #define ETH_DMACCR_8PBL (0x00010000U) /* 8xPBL mode */ macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h573xx.h7721 #define ETH_DMACCR_8PBL ((uint32_t)0x00010000) /* 8xPBL mode */ macro
Dstm32h563xx.h7312 #define ETH_DMACCR_8PBL ((uint32_t)0x00010000) /* 8xPBL mode */ macro

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