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Searched refs:ETH_DMAC1TXCR_TCW_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h15433 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15434 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15436 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15437 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15438 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151fxx_cm4.h15596 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15597 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15599 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15600 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15601 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151axx_ca7.h15433 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15434 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15436 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15437 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15438 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151axx_cm4.h15399 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15400 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15402 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15403 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15404 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151dxx_cm4.h15399 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15400 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15402 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15403 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15404 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151cxx_ca7.h15630 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15631 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15633 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15634 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15635 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151cxx_cm4.h15596 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15597 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15599 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15600 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15601 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp151fxx_ca7.h15630 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
15631 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15633 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15634 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
15635 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153axx_ca7.h16984 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
16985 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16987 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16988 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16989 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153axx_cm4.h16950 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
16951 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16953 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16954 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16955 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153cxx_ca7.h17181 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17182 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17184 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17185 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17186 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153cxx_cm4.h17147 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17148 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17150 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17151 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17152 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153dxx_ca7.h16984 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
16985 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16987 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16988 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16989 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153dxx_cm4.h16950 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
16951 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16953 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16954 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
16955 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153fxx_ca7.h17181 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17182 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17184 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17185 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17186 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp153fxx_cm4.h17147 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17148 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17150 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17151 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17152 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157axx_ca7.h17099 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17100 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17102 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17103 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17104 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157axx_cm4.h17065 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17066 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17068 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17069 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17070 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157cxx_ca7.h17296 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17297 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17299 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17300 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17301 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157cxx_cm4.h17262 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17263 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17265 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17266 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17267 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157dxx_ca7.h17099 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17100 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17102 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17103 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17104 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157dxx_cm4.h17065 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17066 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17068 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17069 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17070 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157fxx_ca7.h17296 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17297 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17299 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17300 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17301 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…
Dstm32mp157fxx_cm4.h17262 #define ETH_DMAC1TXCR_TCW_Pos (1U) macro
17263 #define ETH_DMAC1TXCR_TCW_Msk (0x7UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17265 #define ETH_DMAC1TXCR_TCW_0 (0x1UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17266 #define ETH_DMAC1TXCR_TCW_1 (0x2UL << ETH_DMAC1TXCR_TCW_Pos) /*…
17267 #define ETH_DMAC1TXCR_TCW_2 (0x4UL << ETH_DMAC1TXCR_TCW_Pos) /*…