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Searched refs:DTS_ITR1_TS1_HITTHD_Pos (Results 1 – 25 of 49) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dts.c317 …(hdts->Instance->ITR1, DTS_ITR1_TS1_HITTHD, (hdts->Init.HighThreshold << DTS_ITR1_TS1_HITTHD_Pos)); in HAL_DTS_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dts.c210 …(hdts->Instance->ITR1, DTS_ITR1_TS1_HITTHD, (hdts->Init.HighThreshold << DTS_ITR1_TS1_HITTHD_Pos)); in HAL_DTS_Init()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dts.c319 …(hdts->Instance->ITR1, DTS_ITR1_TS1_HITTHD, (hdts->Init.HighThreshold << DTS_ITR1_TS1_HITTHD_Pos)); in HAL_DTS_Init()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h6644 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
6645 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h523xx.h9083 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
9084 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h562xx.h9809 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
9810 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h533xx.h9492 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
9493 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h573xx.h12302 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
12303 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h563xx.h11893 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
11894 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h17547 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
17548 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7b0xx.h18027 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
18028 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7b0xxq.h18039 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
18040 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7a3xxq.h17559 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
17560 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7b3xx.h18034 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
18035 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7b3xxq.h18046 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
18047 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h730xxq.h19727 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
19728 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h733xx.h19715 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
19716 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h725xx.h19240 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
19241 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h730xx.h19715 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
19716 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h735xx.h19727 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
19728 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h723xx.h19228 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
19229 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5506 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
5507 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7s7xx.h6030 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
6031 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7s3xx.h5951 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
5952 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */
Dstm32h7r7xx.h5583 #define DTS_ITR1_TS1_HITTHD_Pos (16U) macro
5584 #define DTS_ITR1_TS1_HITTHD_Msk (0xFFFFUL << DTS_ITR1_TS1_HITTHD_Pos) /*!< 0xFFFF0000 */

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