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Searched refs:DMA_SxFCR_FEIE (Results 1 – 25 of 92) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h2618 …A_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE); in LL_DMA_EnableIT_FE()
2718 …A_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE); in LL_DMA_DisableIT_FE()
2818 …((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE) == DMA_SxFCR_FEIE); in LL_DMA_IsEnabledIT_FE()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h2651 …A_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE); in LL_DMA_EnableIT_FE()
2751 …A_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE); in LL_DMA_DisableIT_FE()
2851 …((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE) == DMA_SxFCR_FEIE); in LL_DMA_IsEnabledIT_FE()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h2628 …A_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE); in LL_DMA_EnableIT_FE()
2728 …A_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE); in LL_DMA_DisableIT_FE()
2828 …((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE) == DMA_SxFCR_FEIE); in LL_DMA_IsEnabledIT_FE()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dma.h2919 …_BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FEIE); in LL_DMA_EnableIT_FE()
3029 …_BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FEIE); in LL_DMA_DisableIT_FE()
3139 …ef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FEIE) == DMA_SxFCR_FEIE) ? 1… in LL_DMA_IsEnabledIT_FE()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma.h3062 …_BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FEIE); in LL_DMA_EnableIT_FE()
3172 …_BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FEIE); in LL_DMA_DisableIT_FE()
3282 …ef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FEIE) == DMA_SxFCR_FEIE) ? 1… in LL_DMA_IsEnabledIT_FE()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1580 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f410rx.h1580 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f410tx.h1570 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f401xc.h1521 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f401xe.h1521 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f411xe.h1524 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f405xx.h5613 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f412cx.h5674 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f415xx.h5795 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f423xx.h6067 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f407xx.h5913 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f412zx.h5734 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f412rx.h5728 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f412vx.h5730 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f413xx.h6031 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5765 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f205xx.h5615 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f207xx.h5914 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5580 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro
Dstm32f722xx.h5564 #define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk macro

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