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Searched refs:DMA_SxFCR_DMDIS (Results 1 – 25 of 102) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h325 #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en…
1268 …_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_DisableFifoMode()
1288 …_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_EnableFifoMode()
1366 …t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FTH|DMA_SxFCR_DMDIS, FifoMode|Fif… in LL_DMA_ConfigFifo()
Dstm32f2xx_hal_dma.h294 #define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h338 #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en…
1301 …_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_DisableFifoMode()
1321 …_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_EnableFifoMode()
1399 …t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FTH|DMA_SxFCR_DMDIS, FifoMode|Fif… in LL_DMA_ConfigFifo()
Dstm32f7xx_hal_dma.h278 #define DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode enable */
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h335 #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en…
1278 …_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_DisableFifoMode()
1298 …_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_EnableFifoMode()
1376 …t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FTH|DMA_SxFCR_DMDIS, FifoMode|Fif… in LL_DMA_ConfigFifo()
Dstm32f4xx_hal_dma.h304 #define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dma.h315 #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en…
1529 …BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_DisableFifoMode()
1551 …BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_EnableFifoMode()
1635 …ma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FTH | DMA_SxFCR_DMDIS, FifoMode | F… in LL_DMA_ConfigFifo()
Dstm32mp1xx_hal_dma.h462 #define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma.h339 #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en…
1672 …BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_DisableFifoMode()
1694 …BIT(((DMA_Stream_TypeDef *)(dma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_DMDIS); in LL_DMA_EnableFifoMode()
1778 …ma_base_addr + LL_DMA_STR_OFFSET_TAB[Stream]))->FCR, DMA_SxFCR_FTH | DMA_SxFCR_DMDIS, FifoMode | F… in LL_DMA_ConfigFifo()
Dstm32h7xx_hal_dma.h540 #define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_dma.c259 tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); in HAL_DMA_Init()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_dma.c258 tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); in HAL_DMA_Init()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_dma.c256 tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); in HAL_DMA_Init()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_dma.c266 registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); in HAL_DMA_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dma.c320 registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); in HAL_DMA_Init()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1589 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f410rx.h1589 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f410tx.h1579 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f401xc.h1530 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f401xe.h1530 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f411xe.h1533 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f405xx.h5622 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f412cx.h5683 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5774 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro
Dstm32f205xx.h5624 #define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk macro

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