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Searched refs:DMA_SxCR_TRBUFF_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h6631 #define DMA_SxCR_TRBUFF_Pos (20U) macro
6632 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h7b0xx.h6885 #define DMA_SxCR_TRBUFF_Pos (20U) macro
6886 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h7b0xxq.h6886 #define DMA_SxCR_TRBUFF_Pos (20U) macro
6887 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h7a3xxq.h6632 #define DMA_SxCR_TRBUFF_Pos (20U) macro
6633 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h7b3xx.h6885 #define DMA_SxCR_TRBUFF_Pos (20U) macro
6886 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h7b3xxq.h6886 #define DMA_SxCR_TRBUFF_Pos (20U) macro
6887 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h730xxq.h9042 #define DMA_SxCR_TRBUFF_Pos (20U) macro
9043 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h733xx.h9041 #define DMA_SxCR_TRBUFF_Pos (20U) macro
9042 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h725xx.h8788 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8789 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h730xx.h9041 #define DMA_SxCR_TRBUFF_Pos (20U) macro
9042 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h735xx.h9042 #define DMA_SxCR_TRBUFF_Pos (20U) macro
9043 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h742xx.h8514 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8515 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h723xx.h8787 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8788 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h750xx.h8802 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8803 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h753xx.h8802 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8803 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h745xx.h8716 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8717 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h745xg.h8716 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8717 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h743xx.h8609 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8610 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h755xx.h8909 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8910 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h757xx.h8992 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8993 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h747xg.h8799 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8800 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */
Dstm32h747xx.h8799 #define DMA_SxCR_TRBUFF_Pos (20U) macro
8800 #define DMA_SxCR_TRBUFF_Msk (0x1UL << DMA_SxCR_TRBUFF_Pos) /*!< 0x00100000 */