Searched refs:DMA_SxCR_PL_0 (Results 1 – 25 of 97) sorted by relevance
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266 #define DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level: Medium */
280 #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium …
282 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
277 #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium …
292 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
450 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
281 #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium …
528 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
305 #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium …
1503 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
1493 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
1444 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
1447 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5536 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5597 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5718 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5990 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5688 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5538 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5837 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5508 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
5492 #define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */ macro
